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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
The BTSIZE field located in the TR_CTRL register (located in memory), is automatically decremented if its value is
different from zero. Once the value of the BTSIZE field is equal to zero, the CRCCU is disabled by hardware. In this case,
the relevant CRCCU DMA Status Register bit, DMASR, is automatically cleared.
If the COMPARE field of the CRCCU_MR register is set to true, the TR_CRC (Transfer Reference Register) is compared
with the last CRC computed. If a mismatch occurs, an error flag is set and an interrupt is raised (if unmasked).
The CRCCU accesses the memory by single access (TRWIDTH size) in order not to limit the bandwidth usage of the
system, but the DIVIDER field of the CRCCU Mode Register can be used to lower it by dividing the frequency of the
single accesses.
The CRCCU scrolls the defined memory area using ascending addresses.
In order to compute the CRC for a memory size larger than 256 Kbytes or for non-contiguous memory area, it is possible
to re-enable the CRCCU on the new memory area and the CRC will be updated accordingly. Use the RESET field of the
CRCCU_CR register to reset the CRCCU Status Register to its default value (0xFFFF_FFFF).
23.6
Transfer Control Registers Memory Mapping
Note:
These Registers are memory mapped
Table 23-2. Transfer Control Register Memory Mapping 
Offset
Register
Name
Access
CRCCU_DSCR + 0x0
CRCCU Transfer Address Register
TR_ADDR
Read-write
CRCCU_DSCR + 0x4
CRCCU Transfer Control Register
TR_CTRL
Read-write
CRCCU_DSCR + 0xC - 0x10
Reserved
CRCCU_DSCR+0x10
CRCCU Transfer Reference Register
TR_CRC
Read-write