Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Scheda Tecnica

 413

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

When the external device asserts the NWAIT signal (active low), and after internal synchronization of this signal, the
SMC state is frozen, i.e., SMC internal counters are frozen, and all control signals remain unchanged. When the
resynchronized NWAIT signal is deasserted, the SMC completes the access, resuming the access from the point where
it was stopped. See 

the access and to freeze the SMC.

.

EXNW_MODE = 10 (Frozen)
WRITE_MODE = 1 (NWE_controlled)

NWE_PULSE = 5
NCS_WR_PULSE = 7

A[23:0]

MCK

NWE 

NCS

4

3

2

1

1

1

0

1

4

5

6

3

2

2

2

2

1

0

Write cycle

D[7:0]

NWAIT

FROZEN STATE

internally synchronized

NWAIT signal