Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Scheda Tecnica

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Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

INTENCLR

0x06

0x00

Write-protected

z

Bit 7 – OVF: Overflow Interrupt Enable
0: The Overflow interrupt is disabled. 

1: The Overflow interrupt is enabled, and an interrupt request will be generated when the Overflow interrupt flag is 
set.

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Overflow Interrupt Enable bit and disable the corresponding interrupt. 

z

Bit 6 – SYNCRDY: Synchronization Ready Interrupt Enable
0: The synchronization ready interrupt is disabled. 

1: The synchronization ready interrupt is enabled, and an interrupt request will be generated when the Synchroni-
zation Ready interrupt flag is set.

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Synchronization Ready Interrupt Enable bit and disable the corresponding 
interrupt. 

z

Bits 5:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.

z

Bit 0 – ALARM0: Alarm 0 Interrupt Enable
0: The Alarm 0 interrupt is disabled.

1: The Alarm 0 interrupt is enabled, and an interrupt request will be generated when the Alarm 0 interrupt flag is 
set.

Writing a zero to this bit has no effect.

Writing a one to this bit disables the Alarm 0 interrupt. 

Bit

7

6

5

4

3

2

1

0

Access

R/W

R/W

R

R

R

R

R

R/W

Reset

0

0

0

0

0

0

0

0