Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Scheda Tecnica

42023ES–SAM–07/2013

Rev.: 1.0.0.0

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The enhanced debug port embeds a standard ARM debug port plus some specific hardware
intended for testability and activation of the debug port features. All the information related to the
ARM Debug Interface implementation can be found in the ARM Debug Interface v5.1 Architec-
ture Specification document.

It features:

• A single Debug Port (SWJ-DP), that provides the external physical connection to the interface 

and supports two DP implementations:

– the JTAG Debug Port (JTAG-DP)

– the Serial Wire Debug Port (SW-DP)

• A supplementary JTAG TAP (BSCAN-TAP) connected in parallel with the JTAG-DP that 

implements the boundary scan instructions detailed in 

• A JTAG-FILTER module that monitors TCK and RESET_N pins to handle specific features 

like the detection of a debugger hot-plugging and the request of reset of the Cortex-M4 at 
startup.

The JTAG-FILTER module detects the presence of a debugger. When present, JTAG pins are
automatically assigned to the Enhanced Debug Port(EDP). If the SWJ-DP is switched to the SW
mode, then TDI and TDO alternate functions are released. The JTAG-FILTER also implements a
CPU halt mechanism. When triggered, the Cortex-M4 is maintained under reset after the exter-
nal reset is released to prevent any system corruption during later programmation operations.