Atmel Evaluation Kit for the SAM4E Series of Flash Microcontrollers ATSAM4E-EK ATSAM4E-EK Scheda Tecnica

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

712

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Up to 32 Programmable I/O Lines

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Fully Programmable through Set/Clear Registers 

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Multiplexing of Four Peripheral Functions per I/O Line

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For each I/O Line (Whether Assigned to a Peripheral or Used as General Purpose I/O)

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Input Change Interrupt 

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Programmable Glitch Filter

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Programmable Debouncing Filter

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Multi-drive Option Enables Driving in Open Drain

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Programmable Pull-Up on Each I/O Line

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Pin Data Status Register, Supplies Visibility of the Level on the Pin at Any Time

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Additional Interrupt Modes on a Programmable Event: Rising Edge, Falling Edge, Low-Level or High-
Level

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Lock of the Configuration by the Connected Peripheral

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Synchronous Output, Provides Set and Clear of Several I/O Lines in a Single Write

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Register Write Protection

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Programmable Schmitt Trigger Inputs

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Programmable I/O Delay

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Parallel Capture Mode

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Can Be Used to Interface a CMOS Digital Image Sensor, an ADC, etc.

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One Clock, 8-bit Parallel Data and Two Data Enable on I/O Lines

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Data Can be Sampled Every Other Time (For Chrominance Sampling Only)

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Supports Connection of One Peripheral DMA Controller Channel (PDC) Which Offers Buffer 
Reception Without Processor Intervention