Mikroelektronika MikroE Development Kits MIKROE-1207 Scheda Tecnica
Codici prodotto
MIKROE-1207
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 178
Preliminary
© 2009-2012 Microchip Technology Inc.
9.1
CPU Clocking System
The dsPIC33EPXXX(GP/MC/MU)806/810/814 and
PIC24EPXXX(GP/GU)810/814 family of devices
provide seven system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with Phase-Locked Loop (PLL)
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with postscaler
PIC24EPXXX(GP/GU)810/814 family of devices
provide seven system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with Phase-Locked Loop (PLL)
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with postscaler
Instruction execution speed or device operating
frequency, F
frequency, F
CY
, is given by
EQUATION 9-1:
DEVICE OPERATING
FREQUENCY
FREQUENCY
is a block diagram of the PLL module.
provides the relation between input
frequency (F
IN
) and output frequency (F
OSC
).
provides the relation between input
frequency (F
IN
) and VCO frequency (F
VCO
).
FIGURE 9-2:
PLL BLOCK DIAGRAM
EQUATION 9-2:
F
OSC
CALCULATION
EQUATION 9-3:
F
VCO
CALCULATION
F
CY
= Fosc/2
÷ N1
÷ M
÷ N2
PFD
VCO
PLLPRE<4:0>
PLLDIV<8:0>
PLLPOST<2:0>
0.8 MHz < F
REF
< 8.0 MHz
120 MH
Z
< F
VCO
< 340 MH
Z
F
OSC
< 120 MHz @ +125ºC
F
IN
F
REF
F
VCO
F
OSC
F
OSC
< 140 MHz @ +85ºC
F
OSC
F
IN
M
N1
N2
×
----------------------
⎝
⎠
⎛
⎞
×
F
IN
PLLDIV 2
+
(
)
PLLPRE 2
+
(
) 2 PLLPOST 1
+
(
)
×
-----------------------------------------------------------------------------------------
⎝
⎠
⎛
⎞
×
=
=
Where,
N1 = PLLPRE + 2
N2 = 2 x (PLLPOST + 1)
M = PLLDIV + 2
F
VCO
F
IN
M
N1
-------
⎝
⎠
⎛
⎞
×
F
IN
PLLDIV 2
+
(
)
PLLPRE 2
+
(
)
-------------------------------------
⎝
⎠
⎛
⎞
×
=
=