Mikroelektronika MikroE Development Kits MIKROE-1207 Scheda Tecnica
Codici prodotto
MIKROE-1207
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 274
Preliminary
© 2009-2012 Microchip Technology Inc.
FIGURE 13-1:
TYPE B TIMER BLOCK DIAGRAM (x = 2, 4, 6, AND 8)
FIGURE 13-2:
TYPE C TIMER BLOCK DIAGRAM (x = 3, 5, 7, AND 9)
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
TGATE
Set TxIF flag
0
1
Sync
Equal
Reset
TxCK
Prescaler
(/n)
TCKPS<1:0>
Gate
Sync
Sync
F
P(1)
Falling Edge
Detect
Prescaler
(/n)
TCKPS<1:0>
Note 1: F
P
is the peripheral clock.
Latch
Data
CLK
TxCLK
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
TGATE
Set TxIF flag
0
1
Sync
Equal
Reset
TxCK
Prescaler
(/n)
TCKPS<1:0>
Gate
Sync
Sync
F
P(1)
Falling Edge
Detect
Prescaler
(/n)
TCKPS<1:0>
Note 1: F
P
is the peripheral clock.
2: The ADC trigger is available on TMR3 and TMR5 only.
Latch
Data
CLK
TxCLK
ADC Start of
Conversion Trigger
(2)