Mikroelektronika MikroE Development Kits MIKROE-1207 Scheda Tecnica
Codici prodotto
MIKROE-1207
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 604
Preliminary
© 2009-2012 Microchip Technology Inc.
CiFCTRL register ...................................................... 363
CiFEN1 register ........................................................ 369
CiFIFO register ......................................................... 364
CiFMSKSEL1 register............................................... 373
CiFMSKSEL2 register............................................... 374
CiINTE register ......................................................... 366
CiINTF register.......................................................... 365
CiRXFnEID register .................................................. 373
CiRXFnSID register .................................................. 372
CiRXFUL1 register.................................................... 376
CiRXFUL2 register.................................................... 376
CiRXMnEID register.................................................. 375
CiRXMnSID register.................................................. 375
CiRXOVF1 register ................................................... 377
CiRXOVF2 register ................................................... 377
CiTRmnCON register................................................ 378
CiVEC register .......................................................... 362
Modes of Operation .................................................. 359
Overview ................................................................... 357
CiFEN1 register ........................................................ 369
CiFIFO register ......................................................... 364
CiFMSKSEL1 register............................................... 373
CiFMSKSEL2 register............................................... 374
CiINTE register ......................................................... 366
CiINTF register.......................................................... 365
CiRXFnEID register .................................................. 373
CiRXFnSID register .................................................. 372
CiRXFUL1 register.................................................... 376
CiRXFUL2 register.................................................... 376
CiRXMnEID register.................................................. 375
CiRXMnSID register.................................................. 375
CiRXOVF1 register ................................................... 377
CiRXOVF2 register ................................................... 377
CiTRmnCON register................................................ 378
CiVEC register .......................................................... 362
Modes of Operation .................................................. 359
Overview ................................................................... 357
ECAN Registers
Acceptance Filter Enable Register (CiFEN1)............ 369
Acceptance Filter Extended Identifier Register n
Acceptance Filter Extended Identifier Register n
Baud Rate Configuration Register 1 (CiCFG1)......... 367
Baud Rate Configuration Register 2 (CiCFG2)......... 368
Control Register 1 (CiCTRL1)................................... 360
Control Register 2 (CiCTRL2)................................... 361
FIFO Control Register (CiFCTRL) ............................ 363
FIFO Status Register (CiFIFO) ................................. 364
Filter 0-3 Buffer Pointer Register (CiBUFPNT1) ....... 369
Filter 12-15 Buffer Pointer Register (CiBUFPNT4) ... 371
Filter 15-8 Mask Selection Register (CiFMSKSEL2). 374
Filter 4-7 Buffer Pointer Register (CiBUFPNT2) ....... 370
Filter 7-0 Mask Selection Register (CiFMSKSEL1)... 373
Filter 8-11 Buffer Pointer Register (CiBUFPNT3) ..... 370
Interrupt Code Register (CiVEC) .............................. 362
Interrupt Enable Register (CiINTE) ........................... 366
Interrupt Flag Register (CiINTF) ............................... 365
Receive Buffer Full Register 1 (CiRXFUL1).............. 376
Receive Buffer Full Register 2 (CiRXFUL2).............. 376
Receive Buffer Overflow Register 2 (CiRXOVF2)..... 377
Receive Overflow Register (CiRXOVF1) .................. 377
Baud Rate Configuration Register 2 (CiCFG2)......... 368
Control Register 1 (CiCTRL1)................................... 360
Control Register 2 (CiCTRL2)................................... 361
FIFO Control Register (CiFCTRL) ............................ 363
FIFO Status Register (CiFIFO) ................................. 364
Filter 0-3 Buffer Pointer Register (CiBUFPNT1) ....... 369
Filter 12-15 Buffer Pointer Register (CiBUFPNT4) ... 371
Filter 15-8 Mask Selection Register (CiFMSKSEL2). 374
Filter 4-7 Buffer Pointer Register (CiBUFPNT2) ....... 370
Filter 7-0 Mask Selection Register (CiFMSKSEL1)... 373
Filter 8-11 Buffer Pointer Register (CiBUFPNT3) ..... 370
Interrupt Code Register (CiVEC) .............................. 362
Interrupt Enable Register (CiINTE) ........................... 366
Interrupt Flag Register (CiINTF) ............................... 365
Receive Buffer Full Register 1 (CiRXFUL1).............. 376
Receive Buffer Full Register 2 (CiRXFUL2).............. 376
Receive Buffer Overflow Register 2 (CiRXOVF2)..... 377
Receive Overflow Register (CiRXOVF1) .................. 377
ECAN Transmit/Receive Error Count Register (CiEC) ..... 367
ECAN TX/RX Buffer m Control Register (CiTRmnCON) .. 378
Electrical Characteristics................................................... 495
ECAN TX/RX Buffer m Control Register (CiTRmnCON) .. 378
Electrical Characteristics................................................... 495
F
Control Registers ...................................................... 137
Operations ................................................................ 136
Programming Algorithm ............................................ 139
RTSP Operation........................................................ 136
Table Instructions...................................................... 135
Operations ................................................................ 136
Programming Algorithm ............................................ 139
RTSP Operation........................................................ 136
Table Instructions...................................................... 135
H
I
Parallel I/O (PIO) ...................................................... 205
Write/Read Timing .................................................... 206
Write/Read Timing .................................................... 206
In-Circuit Debugger........................................................... 479
In-Circuit Emulation .......................................................... 473
In-Circuit Serial Programming (ICSP)....................... 473, 479
Input Capture .................................................................... 279
In-Circuit Emulation .......................................................... 473
In-Circuit Serial Programming (ICSP)....................... 473, 479
Input Capture .................................................................... 279
Input Change Notification ................................................. 206
Instruction Addressing Modes .......................................... 128
Instruction Addressing Modes .......................................... 128
File Register Instructions .......................................... 128
Fundamental Modes Supported ............................... 129
MAC Instructions ...................................................... 129
MCU Instructions ...................................................... 128
Move and Accumulator Instructions.......................... 129
Other Instructions ..................................................... 129
Fundamental Modes Supported ............................... 129
MAC Instructions ...................................................... 129
MCU Instructions ...................................................... 128
Move and Accumulator Instructions.......................... 129
Other Instructions ..................................................... 129
Instruction Set
Overview................................................................... 484
Summary .................................................................. 481
Summary .................................................................. 481
Idle............................................................................ 192
Sleep ........................................................................ 191
Sleep ........................................................................ 191
Internal RC Oscillator
Internet Address ............................................................... 609
Interrupt Control and Status Registers ............................. 150
Interrupt Control and Status Registers ............................. 150
Interrupt Vector Table (IVT) .............................................. 145
Interrupts Coincident with Power Save Instructions ......... 192
Interrupts Coincident with Power Save Instructions ......... 192
J
JTAG Boundary Scan Interface ........................................ 473
JTAG Interface.................................................................. 479
JTAG Interface.................................................................. 479
M
Memory Organization ......................................................... 47
Microchip Internet Web Site.............................................. 609
Modulo Addressing ........................................................... 130
Microchip Internet Web Site.............................................. 609
Modulo Addressing ........................................................... 130
Applicability............................................................... 131
Operation Example ................................................... 130
Start and End Address ............................................. 130
W Address Register Selection .................................. 130
Operation Example ................................................... 130
Start and End Address ............................................. 130
W Address Register Selection .................................. 130
Most Recent DMA Data Space Address Low Register..... 168
Most Recent DMA Data Space High Address .................. 168
MPLAB ASM30 Assembler, Linker, Librarian ................... 492
MPLAB Integrated Development Environment Software.. 491
MPLAB PM3 Device Programmer .................................... 494
MPLAB REAL ICE In-Circuit Emulator System ................ 493
MPLINK Object Linker/MPLIB Object Librarian ................ 492
Most Recent DMA Data Space High Address .................. 168
MPLAB ASM30 Assembler, Linker, Librarian ................... 492
MPLAB Integrated Development Environment Software.. 491
MPLAB PM3 Device Programmer .................................... 494
MPLAB REAL ICE In-Circuit Emulator System ................ 493
MPLINK Object Linker/MPLIB Object Librarian ................ 492
O
Open-Drain Configuration................................................. 206
Output Compare ............................................................... 285
Output Compare ............................................................... 285
P