Mikroelektronika MikroE Development Kits MIKROE-997 Scheda Tecnica

DS39775C-page 158

© 2009 Microchip Technology Inc.

PORTG is a 5-bit wide, bidirectional port. The corre-
sponding Data Direction register is TRISG. All pins on
PORTG are digital only and tolerate voltages up to
5.5V.
PORTG is multiplexed with EUSART2 functions
(Table 10-16). PORTG pins have Schmitt Trigger input
buffers. PORTG has pins multiplexed with the Parallel
Master Port.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTG pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. The user should refer to the
corresponding peripheral section for the correct TRIS
bit settings. The pin override value is not loaded into
the TRIS register. This allows read-modify-write of the
TRIS register without concern due to peripheral
overrides.

Although the port itself is only five bits wide,
PORTG<7:5> bits are still implemented. These are
used to control the weak pull-ups on the I/O ports
associated with the External Memory Bus (PORTD,
PORTE and PORTJ). Setting these bits enables the
pull-ups. Since these are control bits and are not
associated with port I/O, the corresponding TRISG and
LATG bits are not implemented.

CLRF

PORTG

; Initialize PORTG by
; clearing output
; data latches

CLRF

LATG 

; Alternate method to clear
; output data latches

MOVLW

04h

; Value used to initialize
; data direction

MOVWF

TRISG  ; Set RG1:RG0 as outputs

; RG2 as input
; RG4:RG3 as outputs