Mikroelektronika MikroE Development Kits MIKROE-1105 Scheda Tecnica

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The devices feature two general-purpose dual-port DMAs (DMA1 and DMA2) with 8 
streams each. They are able to manage memory-to-memory, peripheral-to-memory and 
memory-to-peripheral transfers. They feature dedicated FIFOs for APB/AHB peripherals, 
support burst transfer and are designed to provide the maximum peripheral bandwidth 
(AHB/APB).

The two DMA controllers support circular buffer management, so that no specific code is 
needed when the controller reaches the end of the buffer. The two DMA controllers also 
have a double buffering feature, which automates the use and switching of two memory 
buffers without requiring any special code.

Each stream is connected to dedicated hardware DMA requests, with support for software 
trigger on each stream. Configuration is made by software and transfer sizes between 
source and destination are independent.

The DMA can be used with the main peripherals: 
•

SPI and I

2

S

•

I

2

C

•

USART

•

General-purpose, basic and advanced-control timers TIMx

•

DAC

•

SDIO

•

Camera interface (DCMI)

•

ADC.

ARM

Cortex-M4

GP

DMA1

GP

DMA2

MAC

Ethernet

USB OTG

HS

Bus matrix-S

S0

S1

S2

S3

S4

S5

S6

S7

ICODE

DCODE

ACCEL

Flash

memory

SRAM1 

112 Kbyte

SRAM2

16 Kbyte

AHB1

peripherals

AHB2

FSMC

Static MemCtl

M0

M1

M2

M3

M4

M5

M6

I-bus

D-bus

S-bus

DMA_PI

DMA_MEM1

DMA_MEM2

DMA_P2

ETHERNET_M

USB_HS_M

ai18490c

CCM data RAM 

64-Kbyte

APB1

APB2

peripherals