STMicroelectronics 19 V - 90 W adapter with PFC for laptop computers using the L6563H and L6599A EVL6599A-90WADP EVL6599A-90WADP Scheda Tecnica
Codici prodotto
EVL6599A-90WADP
AN3172
Main characteristics and circuit description
Doc ID 17230 Rev 1
7/31
1.3
Fast voltage feed forward
Voltage on the L6563H VFF pin (#5) has the same value as the peak value of the voltage on
the MULT pin (#3) and it is generated by the RC network (R15+R26, C12) connected to VFF,
completing an internal peak-holding circuit. This signal is necessary to derive information on
the RMS input voltage to compensate the loop gain which is mains voltage dependent.
the MULT pin (#3) and it is generated by the RC network (R15+R26, C12) connected to VFF,
completing an internal peak-holding circuit. This signal is necessary to derive information on
the RMS input voltage to compensate the loop gain which is mains voltage dependent.
In general, if the VFF time constant is too small, the voltage generated is affected by a
considerable amount of ripple at twice the mains frequency. Because the VFF signal is fed
into the multiplier the excessive ripple causes distortion of the current reference resulting in
high THD and poor PF. On the other hand, if the time constant is set too large there is a
considerable delay in setting the right amount of feed-forward, resulting in excessive
overshoot or undershoot of the pre-regulator's output voltage in response to large line
voltage changes.
considerable amount of ripple at twice the mains frequency. Because the VFF signal is fed
into the multiplier the excessive ripple causes distortion of the current reference resulting in
high THD and poor PF. On the other hand, if the time constant is set too large there is a
considerable delay in setting the right amount of feed-forward, resulting in excessive
overshoot or undershoot of the pre-regulator's output voltage in response to large line
voltage changes.
To overcome this issue, the L6563H implements the new Fast Voltage Feed Forward
function. As soon as the voltage on the VFF pin decreases from a set threshold (40mV
typically), a mains dip is assumed and an internal switch rapidly discharges the VFF
capacitor via a 10 kΩ resistor. Thanks to this feature it is possible to set an RC circuit with a
long time constant, assuring a low THD, but keeping a fast response to mains voltage
variations.
function. As soon as the voltage on the VFF pin decreases from a set threshold (40mV
typically), a mains dip is assumed and an internal switch rapidly discharges the VFF
capacitor via a 10 kΩ resistor. Thanks to this feature it is possible to set an RC circuit with a
long time constant, assuring a low THD, but keeping a fast response to mains voltage
variations.
1.4
Resonant power stage
The downstream converter implements the ST L6599A, incorporating all the functions
necessary to properly control the resonant converter with a 50 percent fixed duty cycle and
working with variable frequency.
necessary to properly control the resonant converter with a 50 percent fixed duty cycle and
working with variable frequency.
The transformer uses the integrated magnetic approach, incorporating the resonant series
inductance. Therefore, no additional external coil is needed for the resonance.
inductance. Therefore, no additional external coil is needed for the resonance.
The transformer configuration chosen for the secondary winding is centre tap and makes
use of a couple of power schottky rectifiers p/n STPS30H60CFP. A small LC filter has been
added on the output, filtering the high frequency ripple.
use of a couple of power schottky rectifiers p/n STPS30H60CFP. A small LC filter has been
added on the output, filtering the high frequency ripple.
D15, R56, R62, R65, R66, Q5, and Q6 implement an output voltage “fast discharge” circuit,
quickly discharging the output capacitors when the converter is turned off. It has been
implemented to quickly decrease the residual output voltage once the converter is turned off
at no-load.
quickly discharging the output capacitors when the converter is turned off. It has been
implemented to quickly decrease the residual output voltage once the converter is turned off
at no-load.