Intel U1300 LE80538UE0042M Scheda Tecnica
Codici prodotto
LE80538UE0042M
Summary Tables of Changes
14
Specification
Update
Stepping
Number
C0 D0
Dual
Core
Only
Plans ERRATA
AE60 X X
No
Fix
An Enabled Debug Breakpoint or Single Step Trap May Be
Taken after MOV SS/POP SS Instruction if it is Followed by an
Instruction That Signals a Floating Point Exception
Taken after MOV SS/POP SS Instruction if it is Followed by an
Instruction That Signals a Floating Point Exception
AE61 X X
No
Fix
Incorrect Address Computed for Last Byte of FXSAVE/FXRSTOR
Image Leads to Partial Memory Update
Image Leads to Partial Memory Update
AE62 X X
No
Fix
Values for LBR/BTS/BTM Will Be Incorrect after an Exit from
SMM
SMM
AE63
Erratum
Removed
AE64
X
X
No Fix
EFLAGS Discrepancy on Page Faults after a Translation Change
AE65 X X
No
Fix
Returning to Real Mode from SMM with EFLAGS.VM Set May
Result in Unpredictable System Behavior
Result in Unpredictable System Behavior
AE66 X X
No
Fix
A Thermal Interrupt Is Not Generated When the Current
Temperature Is Invalid
Temperature Is Invalid
AE67
X
X
No Fix
Performance Monitoring Event FP_ASSIST May Not Be Accurate
AE68 X X
No
Fix
The BS Flag in DR6 May Be Set for Non-Single-Step #DB
Exception
Exception
AE69 X X
No
Fix
BTM/BTS Branch-from Instruction Address May Be Incorrect for
Software Interrupts
Software Interrupts
AE70 X X
No
Fix
Store to WT Memory Data May Be Seen in Wrong Order by Two
Subsequent Loads
Subsequent Loads
AE71 X X
No
Fix
Single Step Interrupts with Floating Point Exception Pending
May Be Mishandled
May Be Mishandled
AE72 X X
No
Fix
Fault on ENTER Instruction May Result in Unexpected Values on
Stack Frame
Stack Frame
AE73 X X
No
Fix
Non-Temporal Data Store May Be Observed in Wrong Program
Order
Order
AE74 X X
No
Fix
Unaligned Accesses to Paging Structures May Cause the
Processor to Hang
Processor to Hang
AE75 X X
No
Fix
Microcode Updates Performed during VMX Non-root Operation
Could Result in Unexpected Behavior
Could Result in Unexpected Behavior
AE76 X X
No
Fix
INVLPG Operation for Large (2-M/4-M) Pages May Be
Incomplete Under Certain Conditions
Incomplete Under Certain Conditions
AE77 X X
No
Fix
Page Access Bit May Be Set Prior to Signaling a Code Segment
Limit Fault
Limit Fault
AE78 X X
No
Fix
Performance Monitoring Event for Hardware Prefetch Requests
(4EH) and Hardware Prefetch Request Cache Misses (4FH) May
Not Be Accurate
(4EH) and Hardware Prefetch Request Cache Misses (4FH) May
Not Be Accurate
AE79 X X
No
Fix
EFLAGS, CR0, CR4 and the EXF4 Signal May Be Incorrect after
Shutdown
Shutdown
AE80
X
X
No Fix
An Asynchronous MCE during a Far Transfer May Corrupt ESP