Intel 9550 CM8063101049807 Scheda Tecnica

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CM8063101049807
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Intel
®
 Itanium
® 
Processor 9300 Series and 9500 Series Datasheet
31
Electrical Specifications
Notes:
1.
Parameter value at 1/4 Intel
®
 QPI Refclk.
2.
Parameter value at full Intel
®
 QPI Refclk.
3.
The termination small signal resistance; tolerance over the entire signalling voltage range shall not exceed ±5 ohms with 
regard to the average of the values measured in the high output voltage state and the low output voltage state for that pin.
4.
HVM guaranteed error free value for stressed PRBS signaling across PVT. Link BER is the dominant spec of which eye 
dimensions are only one factor, and improving another factor could compensate for eye height or width.
5.
HVM guaranteed error free value for stressed ‘1010 signaling across PVT. Link BER is the dominant spec of which eye 
dimensions are only one factor, and improving another factor could compensate for eye height or width.
6.
See 
.
T
RX-eye-pin
Minimum eye width at pin for clk and data
0.6
UI
4
QPI BER
Lane
Bit Error Rate per lane valid for 4.8 and 6.4 GT/s
1.0E-14
Events
SMI BER
Lane
Bit Error Rate per lane valid for 4.8 and 6.4 GT/s
1.0E-12
Events
Figure 2-6. TX Equalization Diagram
Table 2-6.
Intel
®
 Itanium
®
 Processor 9300 Series Receiver Parameter Values for Intel
®
 
QuickPath Interconnect and Intel
®
 SMI Channels @ 4.8 GT  (Sheet 2 of 2)
Symbol
Parameter
Min
Nom
Max
Units
Notes
C
-1
C
2
C
0
C
1
Vsust
Vpre
Vpost
Vpre = A(C
-1 
- C
0
- C
1
- C
2
)  
Vsust = A(C
-1
+ C
0
+ C
1
+ C
Vpost = A(C
-1
+ C
0
- C
1
- C
2
)
A
-A
Vpost - V pre – Vsust = |C
-1
| + |C
0
|+ |C
1
|+ |C
2
| = 1
Exam ple:  A=500m V, C
-1
= -0.035,  C
0
= 0.685,  C
1
= -0.28, C
2
= 0
Vpre =  0.500(-0.035 – 0.685 +  0.28)  = 0.5(-0.44)  = -220m V
Vpost =  0.500(-0.035 +  0.685 +  0.28)  = 0.5(0.93)  = 465m V
Vsust = 0.500(-0.035 + 0.685 – 0.28) = 0.5(0.37) = 185m V
Peaking =  465/185  =  251%  
C
-1
C
0
C
1
C
2
0
%Peaking =  Vpost/Vsust
C
0
= 1 – sum  of abs value of other coeficents
TXEQ -B O O ST = 20log(Vpost/Vsust) = 20log(465/185) = 8dB
C
-1
C
2
C
0
C
1
Vsust
Vpre
Vpost
Vpre = A(C
-1 
- C
0
- C
1
- C
2
)  
Vsust = A(C
-1
+ C
0
+ C
1
+ C
Vpost = A(C
-1
+ C
0
- C
1
- C
2
)
A
-A
Vpost - V pre – Vsust = |C
-1
| + |C
0
|+ |C
1
|+ |C
2
| = 1
Exam ple:  A=500m V, C
-1
= -0.035,  C
0
= 0.685,  C
1
= -0.28, C
2
= 0
Vpre =  0.500(-0.035 – 0.685 +  0.28)  = 0.5(-0.44)  = -220m V
Vpost =  0.500(-0.035 +  0.685 +  0.28)  = 0.5(0.93)  = 465m V
Vsust = 0.500(-0.035 + 0.685 – 0.28) = 0.5(0.37) = 185m V
Peaking =  465/185  =  251%  
C
-1
C
0
C
1
C
2
0
%Peaking =  Vpost/Vsust
C
0
= 1 – sum  of abs value of other coeficents
TXEQ -B O O ST = 20log(Vpost/Vsust) = 20log(465/185) = 8dB