Intel i5-4200H CL8064701470601 Scheda Tecnica

Codici prodotto

CL8064701470601

2.0

Interfaces

System Memory Interface

•

Two channels of DDR3L/DDR3L-RS memory with Unbuffered Small Outline Dual

In-Line Memory Modules (SO-DIMM) with a maximum of two DIMMs per channel -

Two DIMMs per channel is only supported in Quad Core package

•

Single-channel and dual-channel memory organization modes

•

Data burst length of eight for all memory organization modes

•

DDR3L/DDR3L-RS I/O Voltage of 1.35V

•

64-bit wide channels

•

Non-ECC, Unbuffered DDR3L/DDR3L-RS SO-DIMMs only

•

Theoretical maximum memory bandwidth of:
— 21.3 GB/s in dual-channel mode assuming DDR3L/DDR3L-RS 1333 MT/s
— 25.6 GB/s in dual-channel mode assuming DDR3L/DDR3L-RS 1600 MT/s

System Memory Technology Supported

The Integrated Memory Controller (IMC) supports DDR3L/DDR3L-RS protocols with

two independent, 64-bit wide channels each accessing one or two DIMMs. The IMC

supports one or two unbuffered non-ECC DDR3L/DDR3L-RS DIMM per channel; thus,

allowing up to four device ranks per channel.

Note:

2 DIMMs per channel is only supported in Quad-Core package.

Table 3.

Processor DIMM Support Summary by Product

Processors

Package

DIMM per channel

DDR3L / DDR3L-RS

Quad Core

rPGA, BGA

1 DPC

1333/1600

2 DPC

1333/1600

DDR3L/DDR3L-RS Data Transfer Rates:
•

1333 MT/s (PC3-10600)

•

1600 MT/s (PC3-12800)

DDR3L/DDR3L-RS SO-DIMM Modules:
•

Raw Card B – Single Ranked x8 unbuffered non-ECC

•

Raw Card F – Dual Ranked x8 (planar) unbuffered non-ECC

DRAM Device Technology:

2.1

2.1.1

Processor—Interfaces

Mobile 4th Generation Intel

Core

™

Processor Family, Mobile Intel

Pentium

Processor Family, and Mobile Intel

Celeron

Processor Family

Datasheet – Volume 1 of 2

July 2014

Order No.: 328901-007