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Intel i5-4200H CL8064701470601 Scheda Tecnica

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Figure 6.
Processor Display Architecture
M
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m
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 C
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fi
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 I
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a
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Display 
Pipe A
Display 
Pipe B
Display 
Pipe C
P
a
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l 
F
it
ti
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HD Audio 
Controller
Transcoder A 
DP / HDMI
Timing, VDIP
Transcoder B 
DP / HDMI 
Timing, VDIP
Transcoder C 
DP / HDMI 
Timing, VDIP
eDP Mux
Transcoder eDP* 
DP encoder 
Timing, VDIP 
DPT, SRID
P
o
rt
 M
u
x
Audio 
Codec
DP 
Aux
eDP
X4 eDP
Or
X2 eDP 
and X2 FDI
P
C
H
 D
is
p
la
y
D
D
I 
P
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s
 B
, 
C
, 
a
n
d
 D
X4 DP / 
HDMI / 
DVI
X4 DP / 
HDMI / 
DVI
FDI
FDI 
RX
X4 DP / 
HDMI / 
DVI
Display is the presentation stage of graphics. This involves:
•
Pulling rendered data from memory
•
Converting raw data into pixels
•
Blending surfaces into a frame
•
Organizing pixels into frames
•
Optionally scaling the image to the desired size
•
Re-timing data for the intended target
•
Formatting data according to the port output standard
DisplayPort*
DisplayPort* is a digital communication interface that uses differential signaling to
achieve a high-bandwidth bus interface designed to support connections between PCs
and monitors, projectors, and TV displays. DisplayPort* is also suitable for display
connections between consumer electronics devices, such as high-definition optical disc
players, set top boxes, and TV displays.
A DisplayPort* consists of a Main Link, Auxiliary channel, and a Hot-Plug Detect signal.
The Main Link is a unidirectional, high-bandwidth, and low latency channel used for
transport of isochronous data streams such as uncompressed video and audio. The
Auxiliary Channel (AUX CH) is a half-duplex bidirectional channel used for link
management and device control. The Hot-Plug Detect (HPD) signal serves as an
interrupt request for the sink device.
The processor is designed in accordance with the VESA DisplayPort* Standard Version
1.2a. The processor supports VESA DisplayPort* PHY Compliance Test Specification
1.2a and VESA DisplayPort* Link Layer Compliance Test Specification 1.2a.
Interfaces—Processor
Mobile 4th Generation Intel
®
 Core
™
 Processor Family, Mobile Intel
®
 Pentium
®
 Processor Family, and Mobile Intel
®
 Celeron
®
Processor Family
July 2014
Datasheet – Volume 1 of 2
Order No.: 328901-007
33