Intel E3815 FH8065301567411 Scheda Tecnica
Codici prodotto
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
332
Datasheet
13.3.10
BECREG—Offset 27h
Bunit Extended Configuration Space Config
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
HO
S
T
_IO_B
O
UND
_
H
IGH
RESE
RVED
_0
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
80h
RW
HOST_IO_BOUND_HIGH:
Host IO Boundary High: Bits 31:24 are compared with bits
35:28 of incoming addresses of all memory accesses above 4GB to understand whether
the associated transactions should be routed to memory space (Bunit) or IO space
(Aunit). If bits 35:28 of the address are greater than or equal to the Host IO Boundary
High register field, then the transaction is routed to the MMIO space.
23:0
0000000h
RO
RESERVED_0:
Reserved
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EC
B
ASE
RE
SERV
ED_0
EC
ENAB
LE
Bit
Range
Default &
Access
Field Name (ID): Description
31:28
0h
RW
ECBASE:
EC Boundary (ECBase): Describes bits [31:28] of the range being used to
access memory-mapped configuration space through the AUnit.
27:1
0000000h
RO
RESERVED_0:
Reserved
0
0h
RW
ECENABLE:
EC Enable (ECEnable): When set, causes the ECBase range to be compared
to incoming Host Memory Request addresses. If bits [35:28] of a Memory access match
the ECBase value, then a posted memory operation is treated as a non-posted operation
by the T-unit and A-unit. Additionally, a Memory Write to Configuration Space will be
serialized by T-unit and A-unit hardware as Non-Posted Writes