Intel E3815 FH8065301567411 Scheda Tecnica
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FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
813
14.11.152 STREAM_B_LPE_AUD_CH_STATUS_0—Offset 65808h
Audio Channel Status Attributes 0
Access Method
11
0b
RW
UNDERRUN_PACKET_BIT_SILENT_STREAM_ENABLE:
Set this bit will enble HW to
send valid zero-filled packet with Sample flat bit set when no sample buffer is available,
NCTS packets (or Timesstamp packet) are sent to keep sink in sync even no audio
sound will heard.1= send underrun packets (silent stream)
0= send null packets (default)
Programming note: SW driver shall always set silent stream bit. When SW driver wants
to pause audio, it shall invalidate the two newest allocated audio buffers. When the
current audio buffers are processed, silent stream is sent automatically.
10
0b
RW
USER_BIT_U:
HW will clear this bit ineach sub-frames it sends, But this bit allows to
overwrite hardware setting for special operation like debug or testing for compliance
1= sey U bit in sub-frame
0= clear U bit in sub-frame (default)
9
1b
RW
VALIDITY_BIT_V:
HW will set this bit in both each sub-frames it sends. But this bit
allows to overwrite hardware setting for special operation like debug or testing for
compliance
1= Set V bit in sub-frame (default)
0= clear V bit in sub-frame. For debug or testing
8
0b
RW
SAMPLE_FLAT_BIT:
When set the sample flat bit will be set in all HDMI sub-packets.
1= flat bit is set for valid sample
0= flat bit is not set for valid sample (default)
7
1b
RW
SET_BLOCK_BEGIN_FOR_ALL_SUB_PACKETS:
Controls the B bit in the header of
only the first Audio Packet /frame of a 192 frame 60958 block in Layout 1 mode. This bit
only applies to LPE HDMI mode.
0: The B bit will be set only for sub-packet 0
1: The B bit in the Audio sample packet header will be set for all valid sub-packets.
(default)
6:4
0b
RW
NUM:
audio Channels
000: 2 channels (stereo)
001: 3 channels
010: 4 channels
011: 5 channels
100: 6 channels
101: 7 channels
110: 8 channels
Note: When disable_bogus sample bit is clear HW will always treat odd number of
channels similar to the next higher even number. Thus 3 is similar to 4, 5 to 6 and 7 to
8. This is because SW ensures that an even number of samples are packed in the audio
buffers.
Programming note: Bit 6 of of this field is a write only bit. When reads back, it always
returns zero. Ensure to write bit 6 to 1?b1 when programming for 6/7/8 audio channels.
3:2
0b
RW
FORMAT:
00: L-PCM or IEC 61937
01: High Bit Rate IEC 61937 stream packet (not supported)
10: One Bit Audio Sample packet (not supported)
11: DST Audio Sample packet (not supported)
1
0b
RW
LAYOUT:
0: Layout 0 (2-ch)
1: Layout 1 (3-8 ch)
Note: Layout bit doesn t matter for HBR
0
0b
RW
AUDIO_ENABLE:
Controls generation of N/CTS and transmission of audio sample
packets.
0: Audio sample packets are not transmitted, CTS calculation/transmission is disabled
1: Audio sample packets are transmitted and CTS calculation is enabled
When enable audio unit will wait until the next vertical blank period before sending out
the audio packets. When disable, audio unit may continue to send audio packet until the
end of current active video frame before stopping.
Bit
Range
Default &
Access
Field Name (ID): Description