Intel N2820 FH8065301616603 Scheda Tecnica
Codici prodotto
FH8065301616603
PCU – iLB – IO APIC
1270
Datasheet
Destination ID (DID) and Extended Destination ID (EDID) are used to target a specific
processor core’s local APIC.
processor core’s local APIC.
31.2
Use
The I/O APIC contains indirectly accessed I/O APIC registers and normal memory
mapped registers. There are three memory mapped registers:
mapped registers. There are three memory mapped registers:
•
Index Register (IDX)
•
Window Register (WDW)
•
End Of Interrupt Register (EOI)
The Index register selects an indirect I/O APIC register (ID/VS/RTE[n]) to appear in the
Window register.
Window register.
The Window register is used to read or write the indirect register selected by the Index
register.
register.
The EOI register is written to by the Local APIC in the processor. The I/O APIC
compares the lower eight bits written to the EOI register to the Vector set for each
interrupt (RTE.VCT). All interrupts that match this vector will have their RTE.RIRR
register cleared. All other EOI register bits are ignored.
compares the lower eight bits written to the EOI register to the Vector set for each
interrupt (RTE.VCT). All interrupts that match this vector will have their RTE.RIRR
register cleared. All other EOI register bits are ignored.
31.3
References
TBD
Figure 36. MSI Address and Data
31:16
7:0
10:8
151413:1211
0000h
00b
RTE[n].DLM
RTE[n].VCT
RTE[n].DSM
00b
FEEh
RTE[n].DID
RTE[n].EDID
Set if RTE[n].DLM = 001b
RTE[n].DSM
MSI
Address
MSI
Data
Trigger Mode
Delivery Status (1b)
Delivery Status (1b)
Delivery Mode
Vector
Vector
RTE[n].TM
Destination Mode
Destination ID
Extended Dest. ID
Redirection Hint
Destination Mode
31 : 20
19 : 12
11 : 4
3 2 1 : 0