Renesas M32R-FPU Manuale Utente
2
2-9
M32R-FPU Software Manual (Rev.1.01)
Fig. 2.1.2 DSP function instruction operation 1 (multiply, multiply and accumulate)
Rsrc1
0
15 16
31
H
ACC
0
63
L
0
15 16
31
H
L
x
x
MULLO instruction
MULHI instruction
Rsrc2
Rsrc1
0
31
ACC
0
63
0
15 16
31
H
L
x
x
MULWLO instruction
MULWHI instruction
Rsrc2
32 bits
Rsrc1
0
15 16
31
H
L
0
15 16
31
H
L
x
x
MACLO instruction
MACHI instruction
Rsrc2
ACC
0
63
+
+
0
63
Rsrc1
0
31
32 bits
0
15 16
31
H
L
x
x
MACWLO instruction
MACWHI instruction
Rsrc2
ACC
0
63
+
+
0
63
ACC
ACC
Note: The location in the accumulator of the result and the appropriate sign extension are performed
in the execution of the DSP function instruction. Refer to Chapter 3 for details.
in the execution of the DSP function instruction. Refer to Chapter 3 for details.
INSTRUCTION SET
2.1 Instruction set overview