Arm Enterprises GP4020 Manuale Utente
2: GP4020 Package and Electrical Connections
GP4020 GPS Baseband Processor Design Manual
13
Symbol
Dimensions in millimetres
MIN
Nominal
MAX
A
1.40
1.60
A1
0.05
0.15
A2
1.35
1.45
D
15.80
16.20
D1
13.80
14.20
D3
12.00
E
15.80
16.20
E1
13.80
14.20
E3
12.00
L
0.45
0.75
e
0.50
b
0.17
0.27
c
0.09
0.20
Table 2.1 GP4020 100-pin package dimensions
2.2 GP4020 100-pin Package Electrical Connection Details
All Vdd and GND pins must be connected to ensure reliable operation. Any unused input pins must be tied either
High or Low; no inputs should be left unconnected.
High or Low; no inputs should be left unconnected.
Pin
No.
No.
Signal Name
Type
Circuit
Block
Description
Notes
1
SADD[0]
I/O
MPC
System Address bit 0
2
SADD[1]
I/O
MPC
System Address bit 1
3
SADD[2]
I/O
MPC
System Address bit 2
4
SADD[3]
I/O
MPC
System Address bit 3
5
SADD[4]
I/O
MPC
System Address bit 4
6
SADD[5]
I/O
MPC
System Address bit 5
7
GND
PWR
8
SADD[6]
I/O
MPC
System Address bit 6
9
SADD[7]
I/O
MPC
System Address bit 7
10
VDD
PWR
11
NSCS[0]
I/O
MPC
System Chip Select 0 - Active Low
1
12
NSCS[1]
O
MPC
System Chip Select 1 - Active Low
1
13
NSCS[2A]
O
MPC
System Chip Select 2A - Active Low
1
14
SADD[19]
O
MPC
System Address bit 19
15
SDATA[0]
I/O
MPC
System Data bit 0
1
16
SDATA[1]
I/O
MPC
System Data bit 1
1
17
SDATA[2]
I/O
MPC
System Data bit 2
1
18
SDATA[3]
I/O
MPC
System Data bit 3
1
19
GND
PWR
20
SDATA[4]
I/O
MPC
System Data bit 4
1
21
SDATA[5]
I/O
MPC
System Data bit 5
1
22
VDD
PWR
23
SDATA[6]
I/O
MPC
System Data bit 6
1