Intel Core™ i5-750 Processor (8M Cache, 2.66 GHz) BX8060515750 Manuale Utente
Codici prodotto
BX8060515750
Datasheet, Volume 2
243
Processor Uncore Configuration Registers
4.10.8
MC_CHANNEL_0_MRS_VALUE_2
MC_CHANNEL_1_MRS_VALUE_2
The initial MRS register values for MR2. The RC fields do not need to be programmed if
the address inversion and 3T/1T transitions are disabled.
the address inversion and 3T/1T transitions are disabled.
Device:
4, 5
Function: 0
Offset:
74h
Access as a DWord
Bit
Attr
Default
Description
31:24
RO
0
Reserved
23:20
RW
0
Reserved
19:16
RW
0
Reserved
15:0
RW
0
MR2
The values to write to MR2 for A15:A0.
The values to write to MR2 for A15:A0.