Fujitsu mb91192 Manuale Utente

137

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The port has three registers per bit, namely, DDR, PDR, and PFS and input/output, setup and function

selection can be executed independently per bit. The peripheral function is selected for pin whose PFS is

"1", whereas the port function is selected for these whose PFS is "0".

The pins whose DDR is "1" are set to Output, whereas pins whose DDR is "0" are set to Input. The PFS is

cleared to "0" by reset, and the port function is selected. The PDR is undefined, and the DDR is cleared to

"0" and set to Input.

In terms of the DDR specification per bit, for output setup, the value written to the PDR is output to the pin,

and the PDR contents are read as the read value of the PDR in this case. 

At the time of input setup, the pin will have high impedance status. At this time, the pin level is read from

the read value of the PDR.

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Pin

Peripheral signal

Peripheral input

Peripheral input

Peripheral output

I/O control

PDR

DDR

Data register read

Pin

PDR

PFS

DDR

Data register read

PC1, PC0
PD5, PD4
PD2, PD1

PFS

PC7 to PC2
PD7, PD3
PD0