Fujitsu mb91192 Manuale Utente
238
CHAPTER 16 10-bit A/D Converter
16.1
Overview of 10-bit A/D Converter
The 10-bit successive approximation type A/D converter retains the conversion
initiation modes using software and hardware.
initiation modes using software and hardware.
■
Feature of 10-bit A/D Converter
•
Conversion time 8.4
µs (sampling 6.3 µs, conversion 2.2 µs) in fch:@20 MHz
•
Corporate 6 stages of FIFO soft conversion result (4-bit + 10-bit)
•
Corporate 6 stages of FIFO hard conversion result (4-bit + 10-bit)
•
Channel scan function
■
Block Diagram of 10-bit A/D Converter
Figure 16.1-1 Block Diagram of 10-bit A/D Converter
■
Register List of 10-bit A/D Converter
Figure 16.1-2 Register list of 10-bit A/D Converter
Control Logic
A/D
ch& Status
Control Logic
Internal Data Bus
Buf
(Soft) Fifo 6 steps
(Hard) Fifo 6 steps
D/A Convertor
Comparator
S/H
AN-F
AN-E
AN-D
AN-C
AN-B
AN-A
AN-9
AN-8
AN-7
AN-6
AN-5
AN-4
AN-3
AN-2
AN-1
AN-0
AN-E
AN-D
AN-C
AN-B
AN-A
AN-9
AN-8
AN-7
AN-6
AN-5
AN-4
AN-3
AN-2
AN-1
AN-0
IRQ22(Soft)
IRQ11(Hard)
IRQ11(Hard)
from RTG (RTO4)
from PPG1(OD13)
from PPG0(OD27)
from PPG0(OD26-24)
from PPG1(OD13)
from PPG0(OD27)
from PPG0(OD26-24)
ADST1
ADST0
ch_Sel
M
P
X
X
bit
ADCL
SCSR
HCSR
A/DC Control Register
Soft Conversion Analog Input Selection Register
Soft Conversion Status Register
Soft Conversion FIFO Data Register
Hard Conversion Status Register
Hard Conversion FIFO Data Register
15
87
0
SCIS
SCFD
HCFD
ADCH
Address: 0000A0
H
0000A2
H
0000A4
H
0000A6
H
0000A8
H
0000AA
H