Manuale UtenteSommarioEZ-OTG Features1Typical Applications1Introduction2Processor Core Functional Overview2Processor2Clocking2Memory2Interrupts2General Timers and Watchdog Timer2Power Management2Interface Descriptions2USB Interface3USB Features3USB Pins3OTG Interface3OTG Features3OTG Pins3General Purpose IO Interface3GPIO Description3Unused Pin Descriptions3UART Interface3UART Features4UART Pins4I2C EEPROM Interface4I2C EEPROM Features4I2C EEPROM Pins4Serial Peripheral Interface4SPI Features4SPI Pins4High-Speed Serial Interface4HSS Features4HSS Pins4Host Port Interface (HPI)5HPI Features5HPI Pins5Charge Pump Interface5Charge Pump Features6Charge Pump Pins6Booster Interface6Booster Pins6Crystal Interface6Crystal Pins7Boot Configuration Interface7Operational Modes7Coprocessor Mode7Standalone Mode7Power Savings and Reset Description8Power Savings Mode Description8Sleep8External (Remote) Wakeup Source9Power-On Reset (POR) Description9Reset Pin9USB Reset9Memory Map9Mapping9Internal Memory9Registers10Processor Control Registers10CPU Flags Register [0xC000] [R]10Bank Register [0xC002] [R/W]11Hardware Revision Register [0xC004] [R]11CPU Speed Register [0xC008] [R/W]12Power Control Register [0xC00A] [R/W]13Interrupt Enable Register [0xC00E] [R/W]14Breakpoint Register [0xC014] [R/W]15USB Diagnostic Register [0xC03C] [R/W]16Timer Registers16Watchdog Timer Register [0xC00C] [R/W]17Timer n Register [R/W]18General USB Registers18USB n Control Register [R/W]18USB Host Only Registers19Host n Control Register [R/W]20Host n Address Register [R/W]21Host n Count Register [R/W]21Host n Endpoint Status Register [R]22Host n PID Register [W]23Host n Count Result Register [R]24Host n Device Address Register [W]24Host n Interrupt Enable Register [R/W]25Host n Status Register [R/W]26Host n SOF/EOP Count Register [R/W]27Host n SOF/EOP Counter Register [R]27Host n Frame Register [R]28USB Device Only Registers28Device n Endpoint n Control Register [R/W]28Device n Endpoint n Address Register [R/W]30Device n Endpoint n Count Register [R/W]30Device n Endpoint n Status Register [R/W]31Device n Endpoint n Count Result Register [R/W]33Device n Interrupt Enable Register [R/W]34Device n Address Register [W]36Device n Status Register [R/W]36Device n Frame Number Register [R]38Device n SOF/EOP Count Register [W]38OTG Control Registers39OTG Control Register [0xC098] [R/W]39GPIO Registers40GPIO Control Register [0xC006] [R/W]40GPIO 0 Output Data Register [0xC01E] [R/W]41GPIO 1 Output Data Register [0xC024] [R/W]41GPIO 0 Input Data Register [0xC020] [R]42GPIO 1 Input Data Register [0xC026] [R]42GPIO 0 Direction Register [0xC022] [R/W]42GPIO 1 Direction Register [0xC028] [R/W]43HSS Registers43HSS Control Register [0xC070] [R/W]44HSS Baud Rate Register [0xC072] [R/W]45HSS Transmit Gap Register [0xC074] [R/W]46HSS Data Register [0xC076] [R/W]46HSS Receive Address Register [0xC078] [R/W]47HSS Receive Counter Register [0xC07A] [R/W]47HSS Transmit Address Register [0xC07C] [R/W]48HSS Transmit Counter Register [0xC07E] [R/W]48HPI Registers48HPI Breakpoint Register [0x0140] [R]49Interrupt Routing Register [0x0142] [R]49SIEXmsg Register [W]51HPI Mailbox Register [0xC0C6] [R/W]51HPI Status Port [] [HPI: R]52SPI Registers53SPI Configuration Register [0xC0C8] [R/W]53SPI Control Register [0xC0CA] [R/W]55SPI Interrupt Enable Register [0xC0CC] [R/W]56SPI Status Register [0xC0CE] [R]56SPI Interrupt Clear Register [0xC0D0] [W]57SPI CRC Control Register [0xC0D2] [R/W]57SPI CRC Value Register [0xC0D4] [R/W]58SPI Data Register [0xC0D6] [R/W]58SPI Transmit Address Register [0xC0D8] [R/W]59SPI Transmit Count Register [0xC0DA] [R/W]59SPI Receive Address Register [0xC0DC [R/W]60SPI Receive Count Register [0xC0DE] [R/W]60UART Registers60UART Control Register [0xC0E0] [R/W]61UART Status Register [0xC0E2] [R]61UART Data Register [0xC0E4] [R/W]62Pin Diagram63Pin Descriptions63Absolute Maximum Ratings65Operating Conditions65Crystal Requirements (XTALIN, XTALOUT)65DC Characteristics66USB Transceiver67AC Timing Characteristics67Reset Timing67Clock Timing68I2C EEPROM Timing68HPI (Host Port Interface) Write Cycle Timing69HPI (Host Port Interface) Read Cycle Timing70HSS BYTE Mode Transmit71HSS Block Mode Transmit71HSS BYTE and BLOCK Mode Receive71Hardware CTS/RTS Handshake72Register Summary73Ordering Information77Package Diagram77Dimensioni: 1,57 MBPagine: 78Language: EnglishApri il manuale
