Scheda TecnicaSommario1.0 Electrical Characteristics31.1 Absolute Maximum Ratings †31.2 Specifications3TABLE 1-1: DC Electrical Specifications3TABLE 1-2: AC Electrical Specifications4TABLE 1-3: Digital Electrical Specifications5TABLE 1-4: Temperature Specifications51.3 Timing Diagrams6FIGURE 1-1: Amplifier Start Up.6FIGURE 1-2: Offset Correction Settling Time.6FIGURE 1-3: Output Overdrive Recovery.6FIGURE 1-4: Chip Select (MCP6V03).61.4 Test Circuits6FIGURE 1-5: AC and DC Test Circuit for Most Non-Inverting Gain Conditions.6FIGURE 1-6: AC and DC Test Circuit for Most Inverting Gain Conditions.6FIGURE 1-7: Test Circuit for Dynamic Input Behavior.62.0 Typical Performance Curves72.1 DC Input Precision7FIGURE 2-1: Input Offset Voltage.7FIGURE 2-2: Input Offset Voltage Drift.7FIGURE 2-3: Input Offset Voltage Quadratic Temp Co.7FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L.7FIGURE 2-5: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H.7FIGURE 2-6: Input Offset Voltage vs. Output Voltage.7FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 1.8V.8FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V.8FIGURE 2-9: CMRR.8FIGURE 2-10: PSRR.8FIGURE 2-11: DC Open-Loop Gain.8FIGURE 2-12: CMRR and PSRR vs. Ambient Temperature.8FIGURE 2-13: DC Open-Loop Gain vs. Ambient Temperature.9FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85 C.9FIGURE 2-15: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125 C.9FIGURE 2-16: Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V.9FIGURE 2-17: Input Bias Current vs. Input Voltage (below VSS).92.2 Other DC Voltages and Currents10FIGURE 2-18: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature.10FIGURE 2-19: Output Voltage Headroom vs. Output Current.10FIGURE 2-20: Output Voltage Headroom vs. Ambient Temperature.10FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage.10FIGURE 2-22: Supply Current vs. Power Supply Voltage.10FIGURE 2-23: Power On Reset Trip Voltage.10FIGURE 2-24: Power On Reset Voltage vs. Ambient Temperature.112.3 Frequency Response12FIGURE 2-25: CMRR and PSRR vs. Frequency.12FIGURE 2-26: Open-Loop Gain vs. Frequency with VDD = 1.8V.12FIGURE 2-27: Open-Loop Gain vs. Frequency with VDD = 5.5V.12FIGURE 2-28: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature.12FIGURE 2-29: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage.12FIGURE 2-30: Gain Bandwidth Product and Phase Margin vs. Output Voltage.12FIGURE 2-31: Closed-Loop Output Impedance vs. Frequency with VDD = 1.8V.13FIGURE 2-32: Closed-Loop Output Impedance vs. Frequency with VDD = 5.5V.13FIGURE 2-33: Channel-to-Channel Separation vs. Frequency.13FIGURE 2-34: Maximum Output Voltage Swing vs. Frequency.132.4 Input Noise and Distortion14FIGURE 2-35: Input Noise Voltage Density vs. Frequency.14FIGURE 2-36: Input Noise Voltage Density vs. Input Common Mode Voltage.14FIGURE 2-37: Inter-Modulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-7).14FIGURE 2-38: Inter-Modulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-7).14FIGURE 2-39: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD =1.8V.14FIGURE 2-40: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD =5.5V.142.5 Time Response15FIGURE 2-41: Input Offset Voltage vs. Time with Temperature Change.15FIGURE 2-42: Input Offset Voltage vs. Time at Power Up.15FIGURE 2-43: The MCP6V01/2/3 family shows no input phase reversal with overdrive.15FIGURE 2-44: Non-inverting Small Signal Step Response.15FIGURE 2-45: Non-inverting Large Signal Step Response.15FIGURE 2-46: Inverting Small Signal Step Response.15FIGURE 2-47: Inverting Large Signal Step Response.16FIGURE 2-48: Slew Rate vs. Ambient Temperature.16FIGURE 2-49: Output Overdrive Recovery vs. Time with G = -100 V/V.16FIGURE 2-50: Output Overdrive Recovery Time vs. Inverting Gain.162.6 Chip Select Response (MCP6V03 only)17FIGURE 2-51: Chip Select Current vs. Power Supply Voltage.17FIGURE 2-52: Power Supply Current vs. Chip Select Voltage with VDD = 1.8V.17FIGURE 2-53: Power Supply Current vs. Chip Select Voltage with VDD = 5.5V.17FIGURE 2-54: Chip Select Current vs. Chip Select Voltage.17FIGURE 2-55: Chip Select Voltage, Output Voltage vs. Time with VDD = 1.8V.17FIGURE 2-56: Chip Select Voltage, Output Voltage vs. Time with VDD = 5.5V.17FIGURE 2-57: Chip Select Relative Logic Thresholds vs. Ambient Temperature.18FIGURE 2-58: Chip Select Hysteresis.18FIGURE 2-59: Chip Select Turn On Time vs. Ambient Temperature.18FIGURE 2-60: Chip Select’s Pull-down Resistor (RPD) vs. Ambient Temperature.18FIGURE 2-61: Quiescent Current in Shutdown vs. Power Supply Voltage.183.0 Pin Descriptions19TABLE 3-1: Pin Function Table193.1 Analog Outputs193.2 Analog Inputs193.3 Power Supply Pins193.4 Chip Select (CS) Digital Input193.5 Exposed Thermal Pad (EP)194.0 Applications214.1 Overview of Auto-zeroing Operation21FIGURE 4-1: Simplified Auto-zeroed Op Amp Functional Diagram.21FIGURE 4-2: Normal Mode of Operation (f1); Equivalent Amplifier Diagram.22FIGURE 4-3: Auto-zeroing Mode of Operation (f2); Equivalent Diagram.224.2 Other Functional Blocks23FIGURE 4-4: Simplified Analog Input ESD Structures.23FIGURE 4-5: Protecting the Analog Inputs.234.3 Application Tips24FIGURE 4-6: Output Resistor, RISO, Stabilizes Capacitive Loads.24FIGURE 4-7: Recommended RISO values for Capacitive Loads.24FIGURE 4-8: Output Load Issue.25FIGURE 4-9: One Solution To Output Load Issue.25FIGURE 4-10: Additional Supply Filtering.25FIGURE 4-11: PCB Layout and Schematic for Single Non-inverting and Inverting Amplifiers.26FIGURE 4-12: PCB Layout and Schematic for Single Difference Amplifier.27FIGURE 4-13: PCB Layout and Schematic for Dual Non-inverting Amplifier.27FIGURE 4-14: PCB Layout for Individual Resistors.284.4 Typical Applications29FIGURE 4-15: Simple Design.29FIGURE 4-16: High Performance Design.29FIGURE 4-17: RTD Sensor.29FIGURE 4-18: Thermocouple Sensor; Simplified Circuit.30FIGURE 4-19: Thermocouple Sensor.30FIGURE 4-20: Offset Correction.30FIGURE 4-21: Precision Comparator.305.0 Design Aids315.1 SPICE Macro Model315.2 FilterLab® Software315.3 Mindi™ Circuit Designer & Simulator315.4 Microchip Advanced Part Selector (MAPS)315.5 Analog Demonstration and Evaluation Boards315.6 Application Notes316.0 Packaging Information336.1 Package Marking Information33Dimensioni: 1000 KBPagine: 44Language: EnglishApri il manuale
Manuale UtenteSommarioPreface5Introduction5Document Layout5Conventions Used in this Guide6Recommended Reading7The Microchip Web Site7Customer Support7Document Revision History8Chapter 1. Product Overview91.1 Introduction91.2 Kit Contents91.3 Intended Use101.4 Description10Chapter 2. Installation and Operation132.1 Introduction132.2 Required Tools132.3 Connecting the Lab Equipment132.4 Operating Conditions142.5 Calculating the DUT’s Input Offset Voltage142.6 Converting Input Offset Voltage to Other Parameters142.7 Reducing the Measurement Noise16Chapter 3. Possible Modifications173.1 Introduction173.2 Changing the DUT173.3 Connecting a Chip Select Pin to Ground18Appendix A. Schematics and Layouts19A.1 Introduction19A.2 Schematic19A.3 Combination of the Top Silk Screen and Top Metal Layers21A.4 Top Silk Screen21A.5 Top Metal Layer22A.6 Bottom Metal Layer22Appendix B. Bill Of Materials (BOM)23B.1 MCP6V01 Input Offset Demo Board BOM23Corporate Office24Atlanta24Boston24Chicago24Cleveland24Fax: 216-447-064324Dallas24Detroit24Kokomo24Toronto24Fax: 852-2401-343124Australia - Sydney24China - Beijing24China - Shanghai24India - Bangalore24Korea - Daegu24Korea - Seoul24Singapore24Taiwan - Taipei24Fax: 43-7242-2244-39324Denmark - Copenhagen24France - Paris24Germany - Munich24Italy - Milan24Spain - Madrid24UK - Wokingham24Worldwide Sales and Service24Dimensioni: 466 KBPagine: 24Language: EnglishApri il manuale
