Manuale UtenteSommarioCOVER1Major Revisions in This Edition6INTRODUCTION7CHAPTER 1 OUTLINE (uPD78078 SUBSERIES)331.1 Features331.2 Application Fields341.3 Ordering Information341.4 Quality Grade351.5 Pin Configuration (Top View)361.6 78K/0 Series Expansion421.7 Block Diagram441.8 Outline of Function451.9 Mask Options471.10 Differences with uPD78054 Subseries47CHAPTER 2 OUTLINE (uPD78078Y SUBSERIES)492.1 Features492.2 Application Fields502.3 Ordering Information502.4 Quality Grade512.5 Pin Configuration (Top View)522.6 78K/0 Series Expansion582.7 Block Diagram602.8 Outline of Function612.9 Mask Options632.10 Differences with uPD78054Y Subseries63CHAPTER 3 PIN FUNCTION (uPD78078 SUBSERIES)653.1 Pin Function List653.1.1 Normal operating mode pins653.1.2 PROM programming mode pins (uPD78P078 only)693.2 Description of Pin Functions703.2.1 P00 to P07 (Port 0)703.2.2 P10 to P17 (Port 1)703.2.3 P20 to P27 (Port 2)713.2.4 P30 to P37 (Port 3)723.2.5 P40 to P47 (Port 4)723.2.6 P50 to P57 (Port 5)733.2.7 P60 to P67 (Port 6)733.2.8 P70 to P72 (Port 7)743.2.9 P80 to P87 (Port 8)743.2.10 P90 to P96 (Port 9)753.2.11 P100 to P103 (Port 10)753.2.12 P120 to P127 (Port 12)753.2.13 P130 and P131 (Port 13)763.2.14 AVREF0763.2.15 AVREF1763.2.16 AVDD763.2.17 AVSS763.2.18 RESET#763.2.19 X1 and X2763.2.20 XT1 and XT2763.2.21 VDD773.2.22 VSS773.2.23 VPP (uPD78P078 only)773.2.24 IC (Mask ROM version only)773.3 Input/output Circuits and Recommended Connection of Unused Pins78CHAPTER 4 PIN FUNCTION (uPD78078Y SUBSERIES)834.1 Pin Function List834.1.1 Normal operating mode pins834.1.2 PROM programming mode pins (uPD78P078Y only)874.2 Description of Pin Functions884.2.1 P00 to P07 (Port 0)884.2.2 P10 to P17 (Port 1)884.2.3 P20 to P27 (Port 2)894.2.4 P30 to P37 (Port 3)904.2.5 P40 to P47 (Port 4)904.2.6 P50 to P57 (Port 5)914.2.7 P60 to P67 (Port 6)914.2.8 P70 to P72 (Port 7)924.2.9 P80 to P87 (Port 8)924.2.10 P90 to P96 (Port 9)934.2.11 P100 to P103 (Port 10)934.2.12 P120 to P127 (Port 12)934.2.13 P130 and P131 (Port 13)944.2.14 AVREF0944.2.15 AVREF1944.2.16 AVDD944.2.17 AVSS944.2.18 RESET#944.2.19 X1 and X2944.2.20 XT1 and XT2944.2.21 VDD954.2.22 VSS954.2.23 VPP (uPD78P078Y only)954.2.24 IC (Mask ROM version only)954.3 Input/output Circuits and Recommended Connection of Unused Pins96CHAPTER 5 CPU ARCHITECTURE1015.1 Memory Spaces1015.1.1 Internal program memory space1045.1.2 Internal data memory space1065.1.3 Special function register (SFR) area1065.1.4 External memory space1065.1.5 Data memory addressing1075.2 Processor Registers1105.2.1 Control registers1105.2.2 General registers1135.2.3 Special function register (SFR)1145.3 Instruction Address Addressing1185.3.1 Relative addressing1185.3.2 Immediate addressing1195.3.3 Table indirect addressing1205.3.4 Register addressing1215.4 Operand Address Addressing1225.4.1 Implied addressing1225.4.2 Register addressing1235.4.3 Direct addressing1245.4.4 Short direct addressing1255.4.5 Special function register (SFR) addressing1265.4.6 Register indirect addressing1275.4.7 Based addressing1285.4.8 Based indexed addressing1295.4.9 Stack addressing129CHAPTER 6 PORT FUNCTIONS1316.1 Port Functions1316.2 Port Configuration1366.2.1 Port 01366.2.2 Port 11386.2.3 Port 2 (uPD78078 Subseries)1396.2.4 Port 2 (uPD78078Y Subseries)1416.2.5 Port 31436.2.6 Port 41446.2.7 Port 51456.2.8 Port 61466.2.9 Port 71486.2.10 Port 81506.2.11 Port 91516.2.12 Port 101536.2.13 Port 121556.2.14 Port 131566.3 Port Function Control Registers1576.4 Port Function Operations1636.4.1 Writing to input/output port1636.4.2 Reading from input/output port1636.4.3 Operations on input/output port1636.5 Selection of Mask Option164CHAPTER 7 CLOCK GENERATOR1657.1 Clock Generator Functions1657.2 Clock Generator Configuration1667.3 Clock Generator Control Register1677.4 System Clock Oscillator1717.4.1 Main system clock oscillator1717.4.2 Subsystem clock oscillator1727.4.3 Divider1747.4.4 When no subsystem clocks are used1747.5 Clock Generator Operations1757.5.1 Main system clock operations1767.5.2 Subsystem clock operations1777.6 Changing System Clock and CPU Clock Settings1787.6.1 Time required for switchover between system clock and CPU clock1787.6.2 System clock and CPU clock switching procedure179CHAPTER 8 16-BIT TIMER/EVENT COUNTER1818.1 Outline of Timers Incorporated into uPD78078, 78078Y Subseries1818.2 16-Bit Timer/Event Counter Functions1838.3 16-Bit Timer/Event Counter Configuration1858.4 16-Bit Timer/Event Counter Control Registers1908.5 16-Bit Timer/Event Counter Operations1988.5.1 Interval timer operations1988.5.2 PWM output operations2008.5.3 PPG output operations2038.5.4 Pulse width measurement operations2048.5.5 External event counter operation2118.5.6 Square-wave output operation2138.5.7 One-shot pulse output operation2158.6 16-Bit Timer/Event Counter Operating Precautions219CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 1 AND 22239.1 8-Bit Timer/Event Counters 1 and 2 Functions2239.1.1 8-bit timer/event counter mode2239.1.2 16-bit timer/event counter mode2269.2 8-Bit Timer/Event Counters 1 and 2 Configurations2289.3 8-Bit Timer/Event Counters 1 and 2 Control Registers2319.4 8-Bit Timer/Event Counters 1 and 2 Operations2369.4.1 8-bit timer/event counter mode2369.4.2 16-bit timer/event counter mode2429.5 8-Bit Timer/Event Counters 1 and 2 Precautions246CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 624910.1 8-Bit Timer/Event Counters 5 and 6 Functions24910.2 8-Bit Timer/Event Counters 5 and 6 Configurations25210.3 8-Bit Timer/Event Counters 5 and 6 Control Registers25410.4 8-Bit Timer/Event Counters 5 and 6 Operations25910.4.1 Interval timer operations25910.4.2 External event counter operation26110.4.3 Square-wave output26210.4.4 PWM output operations26410.5 8-Bit Timer/Event Counters 5 and 6 Precautions267CHAPTER 11 WATCH TIMER26911.1 Watch Timer Functions26911.2 Watch Timer Configuration27011.3 Watch Timer Control Registers27111.4 Watch Timer Operations27411.4.1 Watch timer operation27411.4.2 Interval timer operation274CHAPTER 12 WATCHDOG TIMER27512.1 Watchdog Timer Functions27512.2 Watchdog Timer Configuration27712.3 Watchdog Timer Control Registers27812.4 Watchdog Timer Operations28112.4.1 Watchdog timer operation28112.4.2 Interval timer operation282CHAPTER 13 CLOCK OUTPUT CONTROL CIRCUIT28313.1 Clock Output Control Circuit Functions28313.2 Clock Output Control Circuit Configuration28413.3 Clock Output Function Control Registers285CHAPTER 14 BUZZER OUTPUT CONTROL CIRCUIT28914.1 Buzzer Output Control Circuit Functions28914.2 Buzzer Output Control Circuit Configuration28914.3 Buzzer Output Function Control Registers290CHAPTER 15 A/D CONVERTER29315.1 A/D Converter Functions29315.2 A/D Converter Configuration29315.3 A/D Converter Control Registers29615.4 A/D Converter Operations30015.4.1 Basic operations of A/D converter30015.4.2 Input voltage and conversion results30215.4.3 A/D converter operating mode30315.5 A/D Converter Cautions305CHAPTER 16 D/A CONVERTER30916.1 D/A Converter Functions30916.2 D/A Converter Configuration31016.3 D/A Converter Control Registers31216.4 D/A Converter Operations31316.5 D/A Converter Cautions314CHAPTER 17 SERIAL INTERFACE CHANNEL 0 (uPD78078 SUBSERIES)31517.1 Serial Interface Channel 0 Functions31617.2 Serial Interface Channel 0 Configuration31817.3 Serial Interface Channel 0 Control Registers32117.4 Serial Interface Channel 0 Operations32817.4.1 Operation stop mode32817.4.2 3-wire serial I/O mode operation32917.4.3 SBI mode operation33317.4.4 2-wire serial I/O mode operation35717.4.5 SCK0#/P27 pin output manipulation363CHAPTER 18 SERIAL INTERFACE CHANNEL 0 (uPD78078Y Subseries)36518.1 Serial Interface Channel 0 Functions36618.2 Serial Interface Channel 0 Configuration36818.3 Serial Interface Channel 0 Control Registers37218.4 Serial Interface Channel 0 Operations38018.4.1 Operation stop mode38018.4.2 3-wire serial I/O mode operation38118.4.3 2-wire serial I/O mode operation38518.4.4 I2C bus mode operation39018.4.5 Cautions on use of I2C bus mode40818.4.6 Restrictions in I2C bus mode41118.4.7 SCK0#/SCL/P27 pin output manipulation413CHAPTER 19 SERIAL INTERFACE CHANNEL 141519.1 Serial Interface Channel 1 Functions41519.2 Serial Interface Channel 1 Configuration41619.3 Serial Interface Channel 1 Control Registers41819.4 Serial Interface Channel 1 Operations42519.4.1 Operation stop mode42519.4.2 3-wire serial I/O mode operation42619.4.3 3-wire serial I/O mode operation with automatic transmit/receive function429CHAPTER 20 SERIAL INTERFACE CHANNEL 245720.1 Serial Interface Channel 2 Functions45720.2 Serial Interface Channel 2 Configuration45820.3 Serial Interface Channel 2 Control Registers46120.4 Serial Interface Channel 2 Operation46920.4.1 Operation stop mode46920.4.2 Asynchronous serial interface (UART) mode47120.4.3 3-wire serial I/O mode48420.4.4 Restrictions on using UART mode491CHAPTER 21 REAL-TIME OUTPUT PORT49521.1 Real-Time Output Port Functions49521.2 Real-Time Output Port Configuration49521.3 Real-Time Output Port Control Registers497CHAPTER 22 INTERRUPT FUNCTIONS49922.1 Interrupt Function Types49922.2 Interrupt Sources and Configuration50022.3 Interrupt Function Control Registers50422.4 Interrupt Servicing Operations51322.4.1 Non-maskable interrupt request acknowledge operation51322.4.2 Maskable interrupt request acknowledge operation51622.4.3 Software interrupt request acknowledge operation51822.4.4 Multiple interrupt servicing51922.4.5 Interrupt request reserve52222.5 Test Functions52322.5.1 Registers controlling the test function52322.5.2 Test input signal acknowledge operation525CHAPTER 23 EXTERNAL DEVICE EXPANSION FUNCTION52723.1 External Device Expansion Functions52723.2 External Device Expansion Function Control Register53123.3 External Device Expansion Function Timing53423.3.1 Timings in multiplexed bus mode53423.3.2 Timings in separate bus mode539CHAPTER 24 STANDBY FUNCTION54524.1 Standby Function and Configuration54524.1.1 Standby function54524.1.2 Standby function control register54624.2 Standby Function Operations54724.2.1 HALT mode54724.2.2 STOP mode550CHAPTER 25 RESET FUNCTION55325.1 Reset Function553CHAPTER 26 ROM CORRECTION55926.1 ROM Correction Functions55926.2 ROM Correction Configuration55926.3 ROM Correction Control Registers56126.4 ROM Correction Application56226.5 ROM Correction Example56526.6 Program Execution Flow56626.7 Cautions on ROM Correction568CHAPTER 27 uPD78P078, 78P078Y56927.1 Internal Memory Size Switching Register57027.2 Internal Extension RAM Size Switching Register57127.3 PROM Programming57227.3.1 Operating modes57227.3.2 PROM write procedure57427.3.3 PROM reading procedure57827.4 Erasure Procedure (uPD78P078KL-T and 78P078YKL-T Only)57927.5 Opaque Film Masking Window (uPD78P078KL-T and 78P078YKL-T Only)57927.6 Screening of One-Time PROM Versions579CHAPTER 28 INSTRUCTION SET58128.1 Legends Used in Operation List58228.1.1 Operand identifiers and description58228.1.2 Description of "operation" column58323.1.3 Description of "flag operation" column58328.2 Operation List58428.3 Instructions Listed by Addressing Type592APPENDIX A DIFFERENCES BETWEEN uPD78078, 78075B SUBSERIES, AND uPD78070A597APPENDIX B DEVELOPMENT TOOLS599B.1 Language Processing Software602B.2 PROM Writing Tools604B.2.1 Hardware604B.2.2 Software604B.3 Debugging Tools605B.3.1 Hardware605B.3.2 Software607B.4 OS for IBM PC609B.5 System Upgrading from Former-type In-circuit Emulator for 78K/0 Series to IE-78001-R-A609APPENDIX C EMBEDDED SOFTWARE613APPENDIX D REGISTER INDEX615D.1 Register Name Index615D.2 Register Symbol Index619APPENDIX E REVISION HISTORY623Dimensioni: 2,18 MBPagine: 627Language: EnglishApri il manuale
Manuale UtenteSommarioCOVER1Major Revisions in This Edition6INTRODUCTION7CHAPTER 1 OUTLINE (uPD78078 SUBSERIES)331.1 Features331.2 Application Fields341.3 Ordering Information341.4 Quality Grade351.5 Pin Configuration (Top View)361.6 78K/0 Series Expansion421.7 Block Diagram441.8 Outline of Function451.9 Mask Options471.10 Differences with uPD78054 Subseries47CHAPTER 2 OUTLINE (uPD78078Y SUBSERIES)492.1 Features492.2 Application Fields502.3 Ordering Information502.4 Quality Grade512.5 Pin Configuration (Top View)522.6 78K/0 Series Expansion582.7 Block Diagram602.8 Outline of Function612.9 Mask Options632.10 Differences with uPD78054Y Subseries63CHAPTER 3 PIN FUNCTION (uPD78078 SUBSERIES)653.1 Pin Function List653.1.1 Normal operating mode pins653.1.2 PROM programming mode pins (uPD78P078 only)693.2 Description of Pin Functions703.2.1 P00 to P07 (Port 0)703.2.2 P10 to P17 (Port 1)703.2.3 P20 to P27 (Port 2)713.2.4 P30 to P37 (Port 3)723.2.5 P40 to P47 (Port 4)723.2.6 P50 to P57 (Port 5)733.2.7 P60 to P67 (Port 6)733.2.8 P70 to P72 (Port 7)743.2.9 P80 to P87 (Port 8)743.2.10 P90 to P96 (Port 9)753.2.11 P100 to P103 (Port 10)753.2.12 P120 to P127 (Port 12)753.2.13 P130 and P131 (Port 13)763.2.14 AVREF0763.2.15 AVREF1763.2.16 AVDD763.2.17 AVSS763.2.18 RESET#763.2.19 X1 and X2763.2.20 XT1 and XT2763.2.21 VDD773.2.22 VSS773.2.23 VPP (uPD78P078 only)773.2.24 IC (Mask ROM version only)773.3 Input/output Circuits and Recommended Connection of Unused Pins78CHAPTER 4 PIN FUNCTION (uPD78078Y SUBSERIES)834.1 Pin Function List834.1.1 Normal operating mode pins834.1.2 PROM programming mode pins (uPD78P078Y only)874.2 Description of Pin Functions884.2.1 P00 to P07 (Port 0)884.2.2 P10 to P17 (Port 1)884.2.3 P20 to P27 (Port 2)894.2.4 P30 to P37 (Port 3)904.2.5 P40 to P47 (Port 4)904.2.6 P50 to P57 (Port 5)914.2.7 P60 to P67 (Port 6)914.2.8 P70 to P72 (Port 7)924.2.9 P80 to P87 (Port 8)924.2.10 P90 to P96 (Port 9)934.2.11 P100 to P103 (Port 10)934.2.12 P120 to P127 (Port 12)934.2.13 P130 and P131 (Port 13)944.2.14 AVREF0944.2.15 AVREF1944.2.16 AVDD944.2.17 AVSS944.2.18 RESET#944.2.19 X1 and X2944.2.20 XT1 and XT2944.2.21 VDD954.2.22 VSS954.2.23 VPP (uPD78P078Y only)954.2.24 IC (Mask ROM version only)954.3 Input/output Circuits and Recommended Connection of Unused Pins96CHAPTER 5 CPU ARCHITECTURE1015.1 Memory Spaces1015.1.1 Internal program memory space1045.1.2 Internal data memory space1065.1.3 Special function register (SFR) area1065.1.4 External memory space1065.1.5 Data memory addressing1075.2 Processor Registers1105.2.1 Control registers1105.2.2 General registers1135.2.3 Special function register (SFR)1145.3 Instruction Address Addressing1185.3.1 Relative addressing1185.3.2 Immediate addressing1195.3.3 Table indirect addressing1205.3.4 Register addressing1215.4 Operand Address Addressing1225.4.1 Implied addressing1225.4.2 Register addressing1235.4.3 Direct addressing1245.4.4 Short direct addressing1255.4.5 Special function register (SFR) addressing1265.4.6 Register indirect addressing1275.4.7 Based addressing1285.4.8 Based indexed addressing1295.4.9 Stack addressing129CHAPTER 6 PORT FUNCTIONS1316.1 Port Functions1316.2 Port Configuration1366.2.1 Port 01366.2.2 Port 11386.2.3 Port 2 (uPD78078 Subseries)1396.2.4 Port 2 (uPD78078Y Subseries)1416.2.5 Port 31436.2.6 Port 41446.2.7 Port 51456.2.8 Port 61466.2.9 Port 71486.2.10 Port 81506.2.11 Port 91516.2.12 Port 101536.2.13 Port 121556.2.14 Port 131566.3 Port Function Control Registers1576.4 Port Function Operations1636.4.1 Writing to input/output port1636.4.2 Reading from input/output port1636.4.3 Operations on input/output port1636.5 Selection of Mask Option164CHAPTER 7 CLOCK GENERATOR1657.1 Clock Generator Functions1657.2 Clock Generator Configuration1667.3 Clock Generator Control Register1677.4 System Clock Oscillator1717.4.1 Main system clock oscillator1717.4.2 Subsystem clock oscillator1727.4.3 Divider1747.4.4 When no subsystem clocks are used1747.5 Clock Generator Operations1757.5.1 Main system clock operations1767.5.2 Subsystem clock operations1777.6 Changing System Clock and CPU Clock Settings1787.6.1 Time required for switchover between system clock and CPU clock1787.6.2 System clock and CPU clock switching procedure179CHAPTER 8 16-BIT TIMER/EVENT COUNTER1818.1 Outline of Timers Incorporated into uPD78078, 78078Y Subseries1818.2 16-Bit Timer/Event Counter Functions1838.3 16-Bit Timer/Event Counter Configuration1858.4 16-Bit Timer/Event Counter Control Registers1908.5 16-Bit Timer/Event Counter Operations1988.5.1 Interval timer operations1988.5.2 PWM output operations2008.5.3 PPG output operations2038.5.4 Pulse width measurement operations2048.5.5 External event counter operation2118.5.6 Square-wave output operation2138.5.7 One-shot pulse output operation2158.6 16-Bit Timer/Event Counter Operating Precautions219CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 1 AND 22239.1 8-Bit Timer/Event Counters 1 and 2 Functions2239.1.1 8-bit timer/event counter mode2239.1.2 16-bit timer/event counter mode2269.2 8-Bit Timer/Event Counters 1 and 2 Configurations2289.3 8-Bit Timer/Event Counters 1 and 2 Control Registers2319.4 8-Bit Timer/Event Counters 1 and 2 Operations2369.4.1 8-bit timer/event counter mode2369.4.2 16-bit timer/event counter mode2429.5 8-Bit Timer/Event Counters 1 and 2 Precautions246CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 624910.1 8-Bit Timer/Event Counters 5 and 6 Functions24910.2 8-Bit Timer/Event Counters 5 and 6 Configurations25210.3 8-Bit Timer/Event Counters 5 and 6 Control Registers25410.4 8-Bit Timer/Event Counters 5 and 6 Operations25910.4.1 Interval timer operations25910.4.2 External event counter operation26110.4.3 Square-wave output26210.4.4 PWM output operations26410.5 8-Bit Timer/Event Counters 5 and 6 Precautions267CHAPTER 11 WATCH TIMER26911.1 Watch Timer Functions26911.2 Watch Timer Configuration27011.3 Watch Timer Control Registers27111.4 Watch Timer Operations27411.4.1 Watch timer operation27411.4.2 Interval timer operation274CHAPTER 12 WATCHDOG TIMER27512.1 Watchdog Timer Functions27512.2 Watchdog Timer Configuration27712.3 Watchdog Timer Control Registers27812.4 Watchdog Timer Operations28112.4.1 Watchdog timer operation28112.4.2 Interval timer operation282CHAPTER 13 CLOCK OUTPUT CONTROL CIRCUIT28313.1 Clock Output Control Circuit Functions28313.2 Clock Output Control Circuit Configuration28413.3 Clock Output Function Control Registers285CHAPTER 14 BUZZER OUTPUT CONTROL CIRCUIT28914.1 Buzzer Output Control Circuit Functions28914.2 Buzzer Output Control Circuit Configuration28914.3 Buzzer Output Function Control Registers290CHAPTER 15 A/D CONVERTER29315.1 A/D Converter Functions29315.2 A/D Converter Configuration29315.3 A/D Converter Control Registers29615.4 A/D Converter Operations30015.4.1 Basic operations of A/D converter30015.4.2 Input voltage and conversion results30215.4.3 A/D converter operating mode30315.5 A/D Converter Cautions305CHAPTER 16 D/A CONVERTER30916.1 D/A Converter Functions30916.2 D/A Converter Configuration31016.3 D/A Converter Control Registers31216.4 D/A Converter Operations31316.5 D/A Converter Cautions314CHAPTER 17 SERIAL INTERFACE CHANNEL 0 (uPD78078 SUBSERIES)31517.1 Serial Interface Channel 0 Functions31617.2 Serial Interface Channel 0 Configuration31817.3 Serial Interface Channel 0 Control Registers32117.4 Serial Interface Channel 0 Operations32817.4.1 Operation stop mode32817.4.2 3-wire serial I/O mode operation32917.4.3 SBI mode operation33317.4.4 2-wire serial I/O mode operation35717.4.5 SCK0#/P27 pin output manipulation363CHAPTER 18 SERIAL INTERFACE CHANNEL 0 (uPD78078Y Subseries)36518.1 Serial Interface Channel 0 Functions36618.2 Serial Interface Channel 0 Configuration36818.3 Serial Interface Channel 0 Control Registers37218.4 Serial Interface Channel 0 Operations38018.4.1 Operation stop mode38018.4.2 3-wire serial I/O mode operation38118.4.3 2-wire serial I/O mode operation38518.4.4 I2C bus mode operation39018.4.5 Cautions on use of I2C bus mode40818.4.6 Restrictions in I2C bus mode41118.4.7 SCK0#/SCL/P27 pin output manipulation413CHAPTER 19 SERIAL INTERFACE CHANNEL 141519.1 Serial Interface Channel 1 Functions41519.2 Serial Interface Channel 1 Configuration41619.3 Serial Interface Channel 1 Control Registers41819.4 Serial Interface Channel 1 Operations42519.4.1 Operation stop mode42519.4.2 3-wire serial I/O mode operation42619.4.3 3-wire serial I/O mode operation with automatic transmit/receive function429CHAPTER 20 SERIAL INTERFACE CHANNEL 245720.1 Serial Interface Channel 2 Functions45720.2 Serial Interface Channel 2 Configuration45820.3 Serial Interface Channel 2 Control Registers46120.4 Serial Interface Channel 2 Operation46920.4.1 Operation stop mode46920.4.2 Asynchronous serial interface (UART) mode47120.4.3 3-wire serial I/O mode48420.4.4 Restrictions on using UART mode491CHAPTER 21 REAL-TIME OUTPUT PORT49521.1 Real-Time Output Port Functions49521.2 Real-Time Output Port Configuration49521.3 Real-Time Output Port Control Registers497CHAPTER 22 INTERRUPT FUNCTIONS49922.1 Interrupt Function Types49922.2 Interrupt Sources and Configuration50022.3 Interrupt Function Control Registers50422.4 Interrupt Servicing Operations51322.4.1 Non-maskable interrupt request acknowledge operation51322.4.2 Maskable interrupt request acknowledge operation51622.4.3 Software interrupt request acknowledge operation51822.4.4 Multiple interrupt servicing51922.4.5 Interrupt request reserve52222.5 Test Functions52322.5.1 Registers controlling the test function52322.5.2 Test input signal acknowledge operation525CHAPTER 23 EXTERNAL DEVICE EXPANSION FUNCTION52723.1 External Device Expansion Functions52723.2 External Device Expansion Function Control Register53123.3 External Device Expansion Function Timing53423.3.1 Timings in multiplexed bus mode53423.3.2 Timings in separate bus mode539CHAPTER 24 STANDBY FUNCTION54524.1 Standby Function and Configuration54524.1.1 Standby function54524.1.2 Standby function control register54624.2 Standby Function Operations54724.2.1 HALT mode54724.2.2 STOP mode550CHAPTER 25 RESET FUNCTION55325.1 Reset Function553CHAPTER 26 ROM CORRECTION55926.1 ROM Correction Functions55926.2 ROM Correction Configuration55926.3 ROM Correction Control Registers56126.4 ROM Correction Application56226.5 ROM Correction Example56526.6 Program Execution Flow56626.7 Cautions on ROM Correction568CHAPTER 27 uPD78P078, 78P078Y56927.1 Internal Memory Size Switching Register57027.2 Internal Extension RAM Size Switching Register57127.3 PROM Programming57227.3.1 Operating modes57227.3.2 PROM write procedure57427.3.3 PROM reading procedure57827.4 Erasure Procedure (uPD78P078KL-T and 78P078YKL-T Only)57927.5 Opaque Film Masking Window (uPD78P078KL-T and 78P078YKL-T Only)57927.6 Screening of One-Time PROM Versions579CHAPTER 28 INSTRUCTION SET58128.1 Legends Used in Operation List58228.1.1 Operand identifiers and description58228.1.2 Description of "operation" column58323.1.3 Description of "flag operation" column58328.2 Operation List58428.3 Instructions Listed by Addressing Type592APPENDIX A DIFFERENCES BETWEEN uPD78078, 78075B SUBSERIES, AND uPD78070A597APPENDIX B DEVELOPMENT TOOLS599B.1 Language Processing Software602B.2 PROM Writing Tools604B.2.1 Hardware604B.2.2 Software604B.3 Debugging Tools605B.3.1 Hardware605B.3.2 Software607B.4 OS for IBM PC609B.5 System Upgrading from Former-type In-circuit Emulator for 78K/0 Series to IE-78001-R-A609APPENDIX C EMBEDDED SOFTWARE613APPENDIX D REGISTER INDEX615D.1 Register Name Index615D.2 Register Symbol Index619APPENDIX E REVISION HISTORY623Dimensioni: 2,18 MBPagine: 627Language: EnglishApri il manuale
