Manuali utente per PC Concepts SHG2 DP

Sommario

• 1. Introduction

  1
• Figure 1. Intel® SHG2 Server Board

  1
• SHG2 Architecture Overview

  2
• Figure 2. SHG2 Server Board Placement Diagram

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• Document Structure and Outline

  4
• 2. Processor and Chipset

  6
• Overview

  6
• Processor Support

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• Processor Bus Termination/Regulation/Power

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• Miscellaneous Processor Subsystem Logic

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• Server Management Registers and Sensors

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• ServerWorks* Grand Champion* LE Chipset

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• 2.2.5 CMIC-LE

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• Memory Subsystem

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• Chipkill*

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• Memory Configuration

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• Figure 3. SHG2 Memory Bank Layout

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• Table 1. Memory DIMM Pairs

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• 2.3.3 CIOB-X2

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• CSB5 South Bridge

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• PCI Interface

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• PCI Bus Master IDE Interface

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• USB Interface

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• BIOS Flash

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• Compatibility Interrupt Control

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• Power Management

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• General Purpose Input and Output Pins

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• Table 2. CSB5 GPIO Usage Table

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• Chipset Support Components

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• Legacy I/O (Super I/O) National* PC87417VLA

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• Table 3. Serial Port Connector Pinout

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• Table 4. Parallel Port Connector Pinout

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• Table 5. Floppy Port Connector Pinout

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• Table 6. Keyboard Connector Pinout

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• Table 7. Mouse Connector Pinout

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• Table 8. Super I/O* GPIO Usage Table

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• 3. Baseboard PCI I/O Subsystem

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• Overview

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• 64-bit/100MHz PCI-X Subsystem

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• Device IDs (IDSEL)

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• Table 9. PCI(-X) Bus Segment Characteristics

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• Table 10. 64/100MHz Segment Configuration IDs

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• 64/100MHz PCI-X Arbitration

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• 82544GC Gigabit Ethernet Controller

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• 64-bit/133MHz PCI-X Subsystem

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• Device IDs (IDSEL)

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• 64/133MHz Segment Arbitration

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• Table 11. 64/100MHz Segment Arbitration Connections

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• Table 12. 64/133MHz Segment Configuration IDs

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• Ultra 160 SCSI Controller (Adaptec* AIC- 7899)

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• Modular RAID Capable PCI Slot 6

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• 32-bit/33-MHz PCI Subsystem

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• Table 13. 64/133 MHz Segment Arbitration Connections

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• Device IDs (IDSEL)

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• 32/33 MHz PCI Arbitration

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• Network Interface Controller (NIC)

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• Table 14. 32/33MHz Segment Configuration IDs

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• Table 15. 32/33MHz Segment Arbitration Connections

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• Video Controller

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• Table 16. Standard VGA Modes

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• Interrupt Routing

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• Table 17. Video Port Connector Pinout

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• Figure 4. SHG2 Interrupt Routing (PIC Mode)

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• Figure 5. SHG2 Interrupt Routing (Symmetric Mode)

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• Serialized IRQ support

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• IRQ scan for PCIIRQ

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• 4. Clock Generation and Distribution

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• Figure 6. SHG2 Baseboard Clock Distribution

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• 5. Server Management

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• Figure 7. SHG2 Sahalee BMC Block Diagram

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• Sahalee Baseboard Management Controller

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• Table 18. ADM1026* Input Definition

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• System Reset Control

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• Power-up Reset

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• Table 19. Temperature Sensors

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• Hard Reset

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• Soft Reset

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• Figure 8. Basic Reset Flow

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• Intelligent Platform Management Buses

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• Table 20: IPMB Bus Devices

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• Table 21. Private I2C* Bus 1 Devices

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• Table 22: Private I C* Bus 2 Devices

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• Table 23: Private I2C* Bus 3 Devices

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• Table 24: Private I C* Bus 4 Devices

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• Table 25: Private I C* Bus 5 Devices

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• 6. Error Reporting and Handling

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• Error Sources and Types

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• Handling and Logging System Errors

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• Logging Format Conventions

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• Table 26. BIOS Logging SEL List

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• Table 27. Event Request Message Event Data Field Contents

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• System Management Interrupt (SMI) Handler

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• PCI Bus Error

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• Intel Xeon Processor Bus Error

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• Memory Bus Error

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• System Limit Error

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• Processor Failure

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• Boot Event

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• Chip Set Failure

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• Firmware (BMC)

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• System Event Log (SEL) Full

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• Timestamp Clock

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• Fault Resilient Booting

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• Error Messages and Error Codes

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• Alert Standard Forum (ASF) Progress Codes

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• Power-On Self Test (POST) Codes

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• Table 28. Event Request Message Event Data Field Contents

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• Table 29. Port-80h Code Definition

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• Table 30. Standard BIOS POST Codes

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• POST Error Codes and Messages

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• Table 31. Recovery BIOS POST Codes

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• Table 32. POST Error Messages and Codes

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• Liquid Crystal Display (LCD)

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• 7. Jumpers

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• Hardware Configuration

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• Figure 9. Jumper Location

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• Table 33. SHG2 Configuration Jumper Options

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• 8. Connections

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• Connector Locations

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• Figure 10. SHG2 Baseboard Connector Identification and Locations

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• Table 34. SHG2 Baseboard Connectors

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• Power Distribution Board Interface Connector

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• Table 35. Main Power Connector

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• Table 36. +12V Power Connector

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• SCSI Connectors

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• Table 37. Power Connector for I C* Bus

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• Table 38. 68-pin SCSI Connector Pin-out

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• Floppy Connector

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• Table 39. Legacy 34-pin Floppy Connector Pin-out

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• IDE Connectors

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• Table 40. Primary/Secondary IDE 40-pin Connector Pinout

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• Front Panel Interface

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• Table 41. AT Front Panel Header Pinout

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• Processor Connector

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• Table 42. Intel® Xeon™ Processor Connector Pinout

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• System Management Interfaces

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• ICMB Connector

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• Auxiliary I2C* Connector

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• Table 43. ICMB Connector Pin-out

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• Table 44. IPMB Connector Pinout

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• Baseboard Fan Connectors

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• Figure 11. SHG2 Board Fan Connector Locations

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• Figure 12. SHG2 System Redundant Cooling Fan Support

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• Fan Connector Pin-out

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• Table 45. SC5200 Fan Implementation

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• Table 46. Fan Connector Pinout

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• Standard I/O Panel Connectors

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• Figure 13. SHG2 I/O Panel Connector Graphical Locations

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• Universal Serial Bus (USB) Interface

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• Table 47. I/O Panel Connectors

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• Table 48. USB Connector

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• Table 49. Internal USB Connector

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• Mouse and Keyboard Ports

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• Serial Ports

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• Table 50. Mouse and Keyboard Ports

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• Table 51. Serial A Port Connector

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• Parallel Port

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• Table 52. Serial B Port Header: COM2/EMP

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• Table 53. Parallel Port Connector

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• Video Port

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• Ethernet Connectors

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• Table 54. Video Connector

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• Table 55. Ethernet Connectors

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• Figure 14. SHG2 I/O Panel Connector Location Dimensions

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• Table 56. LAN1 10/100 LED Schemes

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• Table 57. LAN2 10/100/1000 LED Schemes

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• Connector Manufacturers and Part Numbers

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• Table 58. Baseboard Connector Manufacturer Part Numbers

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• 9. General Specifications

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• Absolute Maximum Electrical and Thermal Ratings

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• Table 59. Absolute Maximum Electrical and Thermal Specifications

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• Table 60. Thermal Specification for Key Components

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• Airflow Specification for CIOB-X2 and CMIC-LE

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• Electrical Specifications

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• Power Consumption

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• Table 61. Airflow Specification for Key Components

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• Table 62. SHG2 Power Budget

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• Power Supply Specifications

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• Table 63. SHG2 DC Power Supply Voltage Specification

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• Table 64. SHG2 Ripple and Noise Specification

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• Table 65. Voltage Timing Parameters

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• Figure 15. Output Voltage Timing

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• Table 66. Turn On/Off Timing

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• Figure 16. Turn On/Off Timing

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• Table 67. Transient Load Requirements

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• 10. Mechanical Specifications

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• Figure 17. SHG2 Baseboard Mechanical Diagram 1

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• Figure 18. SHG2 Baseboard Mechanical Diagram 2

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• 11. Regulatory and Integration Information

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• Product Regulatory Compliance

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• Product Safety Compliance

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• Product EMC Compliance

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• Product Regulatory Compliance Markings

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• Electromagnetic Compatibility Notices

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• Europe (CE Declaration of Conformity)

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• Conformity)

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• Conformity

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• BSMI (Taiwan)

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• Replacing the Back up Battery

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