Manuali utente per Texas Instruments IC MCU 16B MSP430F2232IRHAT VQFN-40 TID

Sommario

• Features

  1
• Description

  2
  • Development Tool Support

    2
  • MSP430F22x2 Device Pinout, DA Package

    3
  • MSP430F22x4 Device Pinout, DA Package

    3
  • MSP430F22x2 Device Pinout, RHA Package

    4
  • MSP430F22x4 Device Pinout, RHA Package

    5
  • MSP430F22x4, MSP430F22x2 Device Pinout, YFF Package

    6
    • Package Dimensions

      6
  • MSP430F22x2 Functional Block Diagram

    7
  • MSP430F22x4 Functional Block Diagram

    7
• SHORT-FORM DESCRIPTION

  14
  • CPU

    14
  • Instruction Set

    14
  • Operating Modes

    15
  • Interrupt Vector Addresses

    16
  • Special Function Registers

    17
  • Memory Organization

    18
  • Bootstrap Loader (BSL)

    18
  • Flash Memory

    18
  • Peripherals

    19
  • Oscillator and System Clock

    19
  • Brownout

    19
  • Digital I/O

    19
  • Watchdog Timer (WDT+)

    19
  • Timer_A3

    20
  • Timer_B3

    21
  • Universal Serial Communications Interface (USCI)

    21
  • ADC10

    21
  • Operational Amplifier (OA) (MSP430F22x4 only)

    22
  • Peripheral File Map

    23
• Absolute Maximum Ratings

  26
• Recommended Operating Conditions

  26
• Active Mode Supply Current (into DVCC + AVCC) Excluding External Current

  27
  • Typical Characteristics - Active-Mode Supply Current (Into DVCC + AVCC)

    28
• Low-Power-Mode Supply Currents (Into VCC ) Excluding External Current

  29
• Schmitt-Trigger Inputs (Ports P1, P2, P3, P4, and RST/NMI)

  30
• Inputs (Ports P1, P2)

  30
• Leakage Current (Ports P1, P2, P3, and P4)

  30
• Outputs (Ports P1, P2, P3, and P4)

  31
• Output Frequency (Ports P1, P2, P3, and P4)

  31
• Typical Characteristics - Outputs

  32
• POR/Brownout Reset (BOR)

  33
• Typical Characteristics - POR/Brownout Reset (BOR)

  34
  • Main DCO Characteristics

    35
• DCO Frequency

  35
• Calibrated DCO Frequencies - Tolerance at Calibration

  36
• Calibrated DCO Frequencies - Tolerance Over Temperature 0°C to 85°C

  36
• Calibrated DCO Frequencies - Tolerance Over Supply Voltage VCC

  37
• Calibrated DCO Frequencies - Overall Tolerance

  37
• Typical Characteristics - Calibrated 1-MHz DCO Frequency

  38
• Wake-Up From Lower-Power Modes (LPM3/4)

  39
• Typical Characteristics - DCO Clock Wake-Up Time From LPM3/4

  39
• DCO With External Resistor ROSC

  40
• Typical Characteristics - DCO With External Resistor ROSC

  40
• Crystal Oscillator LFXT1, Low-Frequency Mode

  41
• Internal Very-Low-Power Low-Frequency Oscillator (VLO)

  41
• Crystal Oscillator LFXT1, High-Frequency Mode

  42
• Typical Characteristics - LFXT1 Oscillator in HF Mode (XTS = 1)

  43
• Timer_A

  43
• Timer_B

  43
• USCI (UART Mode)

  44
• USCI (SPI Master Mode)

  44
• USCI (SPI Slave Mode)

  44
• USCI (I2C Mode)

  47
• 10-Bit ADC, Power Supply and Input Range Conditions

  48
• 10-Bit ADC, Built-In Voltage Reference

  49
• 10-Bit ADC, External Reference

  50
• 10-Bit ADC, Timing Parameters

  50
• 10-Bit ADC, Linearity Parameters

  51
• 10-Bit ADC, Temperature Sensor and Built-In VMID

  51
• Operational Amplifier (OA) Supply Specifications (MSP430F22x4 Only)

  52
• Operational Amplifier (OA) Input/Output Specifications (MSP430F22x4 Only)

  52
• Operational Amplifier (OA) Dynamic Specifications (MSP430F22x4 Only)

  53
• Operational Amplifier OA Feedback Network, Resistor Network (MSP430F22x4 Only)

  54
• Operational Amplifier (OA) Feedback Network, Comparator Mode (OAFCx = 3) (MSP430F22x4 Only)

  54
• Operational Amplifier (OA) Feedback Network, Noninverting Amplifier Mode (OAFCx = 4) (MSP430F22x4 Only)

  55
• Operational Amplifier (OA) Feedback Network, Inverting Amplifier Mode (OAFCx = 6) (MSP430F22x4 Only)

  55
• Flash Memory

  56
• RAM

  56
• JTAG and Spy-Bi-Wire Interface

  57
• JTAG Fuse

  57
• APPLICATION INFORMATION

  58
  • Port P1 Pin Schematic: P1.0 to P1.3, Input/Output With Schmitt Trigger

    58
  • Port P1 Pin Schematic: P1.4 to P1.6, Input/Output With Schmitt Trigger and In-System Access Features

    59
  • Port P1 Pin Schematic: P1.7, Input/Output With Schmitt Trigger and In-System Access Features

    60
  • Port P2 Pin Schematic: P2.0, P2.2, Input/Output With Schmitt Trigger

    61
  • Port P2 Pin Schematic: P2.1, Input/Output With Schmitt Trigger

    62
  • Port P2 Pin Schematic: P2.3, Input/Output With Schmitt Trigger

    63
  • Port P2 Pin Schematic: P2.4, Input/Output With Schmitt Trigger

    65
  • Port P2 Pin Schematic: P2.5, Input/Output With Schmitt Trigger and External ROSC for DCO

    66
  • Port P2 Pin Schematic: P2.6, Input/Output With Schmitt Trigger and Crystal Oscillator Input

    67
  • Port P2 Pin Schematic: P2.7, Input/Output With Schmitt Trigger and Crystal Oscillator Output

    68
  • Port P3 Pin Schematic: P3.0, Input/Output With Schmitt Trigger

    69
  • Port P3 Pin Schematic: P3.1 to P3.5, Input/Output With Schmitt Trigger

    70
  • Port P3 Pin Schematic: P3.6 to P3.7, Input/Output With Schmitt Trigger

    71
  • Port P4 Pin Schematic: P4.0 to P4.2, Input/Output With Schmitt Trigger

    72
  • Port P4 Pin Schematic: P4.3 to P4.4, Input/Output With Schmitt Trigger

    73
  • Port P4 Pin Schematic: P4.5, Input/Output With Schmitt Trigger

    75
  • Port P4 Pin Schematic: P4.6, Input/Output With Schmitt Trigger

    76
  • Port P4 Pin Schematic: P4.7, Input/Output With Schmitt Trigger

    77
  • JTAG Fuse Check Mode

    78
• Revision History

  79