Manuali utente per Texas Instruments Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER DAC8531EVM

Sommario

• IMPORTANT NOTICE

  2
• EVM IMPORTANT NOTICE

  3
• EVM WARNINGS AND RESTRICTIONS

  4
• Read This First

  5
  • About This Manual

    5
  • How to Use This Manual

    5
  • Information About Cautions and Warnings

    5
  • Related Documentation From Texas Instruments

    6
  • Questions About This or Other Data Converter EVM’s

    6
  • FCC Warning

    6
• Contents

  7
• Figures

  8
• Tables

  8
• EVM Overview

  9
  • 1.1 Features

    10
    • Table 1–1. List of DAC Devices Supported by This EVM

      10
  • 1.2 Power Requirements

    10
    • 1.2.1 Supply Voltage

      10
    • 1.2.2 Reference Voltage

      11
  • 1.3 EVM Basic Functions

    11
    • Figure 1–1. EVM Block Diagram

      12
• Physical Description

  13
  • 2.1 PCB Layout

    14
    • Figure 2–1. Top Assembly

      14
    • Figure 2–2. Bottom Assembly

      14
    • Figure 2–3. Layer 1 (Silkscreen Top)

      15
    • Figure 2–4. Layer 2 (Ground Plane)

      15
    • Figure 2–5. Layer 3 (Power Plane)

      16
    • Figure 2–6. Layer 4 (Silkscreen Bottom)

      16
    • Figure 2–7. Top Paste

      17
    • Figure 2–8. Bottom Paste

      17
    • Figure 2–9. Drill Layer (Mechanical Specifications)

      18
  • 2.2 Bill of Materials

    19
    • Table 2–1. Parts Lists

      19
• EVM Operation

  23
  • 3.1 Stand-Alone DC Mode Test

    24
    • 3.1.1 Factory Default

      24
      • Table 3–1. Factory Default Jumper Setting

        24
    • 3.1.2 Test Mode Operation

      24
      • Table 3–2.Modes of Operation for the DAC8531

        25
      • Figure 3–1. Switch SW2 and SW3 Mapping to the Data Input Register (16-B\ it Version)

        25
      • Figure 3–2. Switch SW3 Mapping to the Data Input Register (12-Bit Versi\ on)

        25
      • Figure 3–3. Write Sequence Timing Diagram

        26
      • Figure 3–4. Zero-Scale Output

        26
      • Figure 3–5. Half-Scale Output

        27
      • Figure 3–6. Full-Scale Output

        27
  • 3.2 Host Processor Interface

    27
    • 3.2.1 Signal Interface

      28
    • 3.2.2 Host Processor Operation

      29
      • Table 3–3. Unity Gain Output Jumper Settings

        30
      • Table 3–4. Gain of Two Output Jumper Settings

        30
      • Table 3–5. Capacitive Load Drive Output Jumper Settings

        31
    • 3.2.3 Bipolar Operation Using the DAC8531

      31
      • Figure 3–7. Bipolar Operation With the DAC8531

        31
      • Table 3–6. Bipolar Operation Output Jumper Settings

        32
      • Figure 3–8. DAC8531 Bipolar Output of Operation

        32
  • 3.3 Jumper Setting

    33
    • Table 3–7. Jumper Setting Function

      33
  • 3.4 I/O Signal Mapping

    34
    • 3.4.1 Daughterboard Connector Signal Mapping

      34
    • Figure 3–9. Daughterboard Connector Signal Mapping

      35
    • 3.4.2 DSP and Microcontroller Connector Signal Mapping

      35
    • Figure 3–10. DSP and Microcontroller Signal Mapping

      36
    • 3.4.3 DAC Output Connector

      36
  • 3.5 Schematic Diagram

    36
    • Sheet 1 of 5

      37
    • Sheet 2 of 5

      38
    • Sheet 3 of 5

      39
    • Sheet 4 of 5

      40
    • Sheet 5 of 5

      41