Hitachi H8/3692 ユーザーズマニュアル

ページ / 397
Rev. 1.0, 07/01, page 94 of 372
Erase start
Set EBR1
Enable WDT
Wait 1 
µ
s
Wait 100 
µ
s
Set SWE bit in FLMCR1 to 1
n = 1
Set ESU bit in FLMCR1 to 1
Set E bit to 1
Wait 10 
µ
s
Clear E bit to 0
Wait 10 
µ
s
Clear ESU bit in FLMCR1 to 0
10 
µ
s
Disable WDT
Read verify data
Increment address
Verify data = all 1s ?
Last address of block ?
All erase blocks erased ?
Set block start address as verify address
H'FF dummy write to verify address
Wait 20 
µ
s
Wait 2 
µ
s
Set EV bit to 1
Wait 100 
µ
s
End of erasing
Clear SWE bit to 0
Wait 4 
µ
s
Clear EV bit to 0
100 ?
Wait 100 
µ
s
Erasing failure
Clear SWE bit to 0
Wait 4
µ
s
Clear EV bit to 0
← 
n + 1
Yes
No
Yes
Yes
Yes
Yes
No
No
No
Figure 7-4   Erase/Erase-Verify Flowchart