Hitachi H8/3692 ユーザーズマニュアル
Rev. 1.0, 07/01, page 155 of 372
Bit
Bit Name
Initial Value R/W
Description
7
CTS
0
R/W
Counter Start
The counter operation is halted when this bit is 0; while it
can be performed when this bit is 1.
can be performed when this bit is 1.
6
−
1
−
Reserved
This bit is always read as 1 and cannot be modified.
5
BUFEB
0
R/W
Buffer Operation B
Selects the GRD function.
0: GRD operates as an input capture/output compare
register
register
1: GRD operates as the buffer register for GRB
4
BUFEA
0
R/W
Buffer Operation A
Selects the GRC function.
0: GRC operates as an input capture/output compare
register
register
1: GRC operates as the buffer register for GRA
3
−
1
−
Reserved
This bit is always read as 1 and cannot be modified.
2
PWMD
0
R/W
PWM Mode D
Selects the output mode of the FTIOD pin.
0: FTIOD operates normally (output compare output)
1: PWM output
1
PWMC
0
R/W
PWM Mode C
Selects the output mode of the FTIOC pin.
0: FTIOC operates normally(output compare output)
1: PWM output
0
PWMB
0
R/W
PWM Mode B
Selects the output mode of the FTIOB pin.
0: FTIOB operates normally(output compare output)
1: PWM output