Hitachi H8/3692 ユーザーズマニュアル
Rev. 1.0, 07/01, page 186 of 372
Bit
Bit Name
Initial Value
R/W
Description
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock Select 0 and 1
These bits select the clock source for the baud
rate generator.
rate generator.
00: ø clock (n = 0)
01: ø/4 clock (n = 1)
10: ø/16 clock (n = 2)
11: ø/64 clock (n = 3)
For the relationship between the bit rate register
setting and the baud rate, see section 14.3.8, Bit
Rate Register (BRR). n is the decimal
representation of the value of n in BRR (see
section 14.3.8, Bit Rate Register (BRR)).
setting and the baud rate, see section 14.3.8, Bit
Rate Register (BRR). n is the decimal
representation of the value of n in BRR (see
section 14.3.8, Bit Rate Register (BRR)).
14.3.6
Serial Control Register 3 (SCR3)
SCR3 is a register that enables or disables SCI transfer operations and interrupt requests, and is
also used to select the transfer clock source. For details on interrupt requests, refer to section 14.7,
Interrupts.
also used to select the transfer clock source. For details on interrupt requests, refer to section 14.7,
Interrupts.
Bit
Bit Name
Initial Value
R/W
Description
7
TIE
0
R/W
Transmit Interrupt Enable
When this bit is set to 1, the TXI interrupt request
is enabled.
is enabled.
6
RIE
0
R/W
Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt
requests are enabled.
requests are enabled.
5
TE
0
R/W
Transmit Enable
When this bit s set to 1, transmission is enabled.
4
RE
0
R/W
Receive Enable
When this bit is set to 1, reception is enabled.