Hitachi H8/3692 ユーザーズマニュアル

Rev. 1.0, 07/01, page 212 of 372

Figure 14-16 shows a sample flowchart for multiprocessor serial data transmission. For an ID
transmission cycle, set the MPBT bit in SSR to 1 before transmission. For a data transmission
cycle, clear the MPBT bit in SSR to 0 before transmission. All other SCI operations are the same
as those in asynchronous mode.

No

Yes

Start transmission

Read TDRE flag in SSR

[1]

Set MPBT bit in SSR

Yes

No

No

Yes

Read TEND flag in SSR

[2]

No

Yes

[3]

Clear PDR to 0 and set PCR to 1

Clear TE bit in SCR3 to 0

TDRE = 1

All data transmitted?

TEND = 1

Break output?

Write transmit data to TDR

[1]

After reading SSR and checking that 

the TDRE flag is set to 1, set the 

MPBT bit in SSR to 0 or 1, then write 

transmit data to TDR. When data is 

written to TDR, the TDRE flag is 

automatically cleared to 0.

[2]

To continue serial transmission, be 

sure to read 1 from the TDRE flag to 

confirm that writing is possible, then 

write data to TDR. When data is 

written to TDR, the TDRE flag is 

automatically cleared to 0.

[3]

To output a break in serial 

transmission, set the port PCR to 1, 

clear PDR to 0, then clear the TE bit 

in SCR3 to 0.

End