Hitachi H8/3692 ユーザーズマニュアル

Rev. 1.0, 07/01, page 238 of 372

TDRE

TEND

ICDRS

ICDRR

[1] Clear TDRE after clearing
     TEND and TRS

[2] Read ICDRR (dummy read)

[3] Read ICDRR

1

A

2

1

3

4

5

6

7

8

9

9

A

TRS

RDRF

SCL

(Master output)

SDA

(Master output)

SDA

(Slave output)

Bit 7

Master transmit mode

Master receive mode

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

User

processing

Data 1

Data 1

RDRF

RCVD

ICDRS

ICDRR

Data n-1

Data n

Data n

Data n-1

[5] Read ICDRR after setting RCVD

[6] Issue stop
     condition

[7] Read ICDRR,
     and clear RCVD

[8] Set slave
     receive mode

1

9

2

3

4

5

6

7

8

9

A

A/

SCL

(Master output)

SDA

(Master output)

SDA

(Slave output)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

User

processing