Hitachi H8/3692 ユーザーズマニュアル
Rev. 1.0, 07/01, page 338 of 372
Table A.3
Number of Cycles in Each Instruction
Execution Status
Access Location
(Instruction Cycle)
On-Chip Memory
On-Chip Peripheral Module
Instruction fetch
S
I
2
—
Branch address read
S
J
Stack operation
S
K
Byte data access
S
L
2 or 3
*
Word data access
S
M
—
Internal operation
S
N
1
Note:
*
Depends on which on-chip module is accessed. See section 19, Register Addresses.