Hitachi H8/3692 ユーザーズマニュアル
Rev. 1.0, 07/01, page 26 of 372
Table 2-9
Block Data Transfer Instructions
Instruction
Size
Function
EEPMOV.B
—
if R4L
≠
0 then
Repeat @ER5+
→
@ER6+,
R4L–1
→
R4L
Until R4L = 0
else next;
else next;
EEPMOV.W
—
if R4
≠
0 then
Repeat @ER5+
→
@ER6+,
R4–1
→
R4
Until R4 = 0
else next;
else next;
Transfers a data block. Starting from the address set in ER5, transfers
data for the number of bytes set in R4L or R4 to the address location set
in ER6.
data for the number of bytes set in R4L or R4 to the address location set
in ER6.
Execution of the next instruction begins as soon as the transfer is
completed.
completed.
2.4.2
Basic Instruction Formats
H8/300H CPU instructions consist of 2-byte (1-word) units. An instruction consists of an
operation field (op), a register field (r), an effective address extension (EA), and a condition field
(cc).
operation field (op), a register field (r), an effective address extension (EA), and a condition field
(cc).
Figure 2-7 shows examples of instruction formats.