Fujitsu MCE3064SS ユーザーズマニュアル
C156-E097-01EN
7 - 13
7.5
Bus Phases
The SCSI bus must be in one of the follwing eight phases:
•
BUS FREE phase
•
ARBITRATION phase
•
SELECTION phase
•
COMMAND phase
•
DATA phase
•
STATUS phase
•
MESSAGE phase
The SCSI bus can never be in more than one phase at any given time.
Note:
In the following bus phase definition, signals are false unless otherwise defined. Signals on
the timing charts are assumed to be positive logic.
the timing charts are assumed to be positive logic.
7.5.1
BUS FREE phase
No SCSI device uses the bus during a BUS FREE phase. SCSI devices shall detect the BUS
FREE phase after SEL and BSY signals are both false for at least 400 ns (Bus Settle Delay).
FREE phase after SEL and BSY signals are both false for at least 400 ns (Bus Settle Delay).
SCSI devices which have detected the BUS FREE phase shall release all bus signals within 800
ns (Bus Clear Delay) after BSY and SEL become false for a Bus Settle Delay. If an SCSI device
requires more than 400 ns (Bus Settle Delay) to detect the BUS FREE phase, it shall release all
bus signals within the following period (t):
ns (Bus Clear Delay) after BSY and SEL become false for a Bus Settle Delay. If an SCSI device
requires more than 400 ns (Bus Settle Delay) to detect the BUS FREE phase, it shall release all
bus signals within the following period (t):
t = 800 ns (Bus Clear Delay) – (Period required for BUS FREE phase detection)
+ 400 ns (Bus Settle Delay)
+ 400 ns (Bus Settle Delay)
The maximum time allowed for releasing the bus after both SEL and BSY becomes false is 1.2
µ
s.
Figure 7.5 shows the BUS FREE phase.
INFORMATION TRANSFER phase