Intel X3360 AT80569KJ073N データシート

Datasheet

27

Valid high and low levels are determined by the input buffers by comparing with a 

reference voltage called GTLREF. 

 lists the GTLREF specifications. The GTL+ 

reference voltage (GTLREF) should be generated on the system board using high 

precision voltage divider circuits. For more details on platform design, see the 

applicable platform design guide.

NOTES:
1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

GTLREF is to be generated from VTT by a voltage divider of 1% resistors. If an Variable 
GTLREF circuit is used on the board the GTLREF lands connected to the Variable GTLREF 
circuit may require different resistor values. Each GTLREF land must be connected, refer to 
the platform design guide for implementation details. 

3.

R

TT

 is the on-die termination resistance measured at V

TT

/3 of the GTL+ output driver. 

Refer to the appropriate platform design guide for the board impedance. Refer to processor 
I/O buffer models for I/V characteristics.

4.

COMP resistance must be provided on the system board with 1% resistors. See the 
applicable platform design guide for implementation details. COMP[3:0] and COMP8 
resistors are to V

SS

.

GTLREF_PU GTLREF pull up resistor

57.6 * 0.99

57.6

57.6 * 1.01

Ω

2

GTLREF_PD GTLREF pull down resistor 

100 * 0.99

100

100 * 1.01

Ω

2

R

TT

Termination Resistance

45

50

55

Ω

3

COMP[3:0]

COMP Resistance

49.40

49.90

50.40

Ω

4

COMP8

COMP Resistance

24.65

24.90

25.15

Ω

4