Hynix HMP125U6EFR8C-S6 ユーザーズマニュアル

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DDR2 Device Operations & Timing Diagram
Contents
1. Functional Description
1.1 Simplified State Diagram
1.2 Basic Function & Operation of DDR2 SDRAM
1.2.1 Power up and Initialization
1.2.2 Programming the Mode and Extended Mode Registers
1.2.2.1 DDR2 SDRAM Mode Register (MR)
1.2.2.2 DDR2 SDRAM Extended Mode Register 
1.2.2.3 Off-Chip Driver(OCD) Impedance Adjustment
1.2.2.4 ODT(On Die Termination)
1.3 Bank Activate Command
1.4 Read and Write Command
1.4.1 Posted CAS
1.4.2 Burst Mode Operation
1.4.3 Burst Read Command
1.4.4 Burst Write Operation
1.4.5 Write Data Mask
1.5 Precharge Operation
1.6 Auto Precharge Operation
1.7 Refresh Commands
1.7.1 Auto Refresh Command
1.7.2 Self Refresh Command
1.8 Power Down
1.9 Asynchronous CKE LOW Event
1.10 No Operation Command
1.11 Deselect Command
2. Truth Tables
2.1 Command Truth Table
2.2 Clock Enable(CKE) Truth Table for Synchronous Transistors
2.3 Data Mask Truth Table
3. Maximum DC Ratings
3.1 Absolute Maximum DC Ratings
3.2 Operating Temperature Condition 
4. AC & DC Operating Conditions
4.1 DC Operation Conditions
4.1.1 Recommended DC Operating Conditions(SSTL_1.8)
4.1.2 ODT DC Electrical Characteristics
4.2 DC & AC Logic Input Levels
4.2.1 Input DC Logic Level
4.2.2 Input AC Logic Level
4.2.3 AC Input Test Conditions
4.2.4 Differential Input AC Logic Level
4.2.5 Differential AC output parameters
4.2.6 Overshoot / Undershoot Specification
4.3 Output Buffer Levels
4.3.1 Output AC Test Conditions
4.3.2 Output DC Current Drive
4.3.3 OCD default chracteristics
4.4 Default Output V-I Characteristics
4.4.1 Full Strength Default Pulldown Driver Characteristics