Intel EP80579 ユーザーズマニュアル

Intel

®

 EP80579 Software for Security Applications on Intel

®

 QuickAssist Technology

PG

August 2009

38

Order Number: 320183

The EP80579 with QuickAssist SKUs provide a direct non-coherent (NCDRAM) path 

between AIOC devices and the Memory Controller which is highlighted in red in 

The Software for Intel

®

 EP80579 Integrated Processor product line uses three different 

memory regions, as defined in 

. The BIOS is responsible for setting up these 

regions. The IA/ASU Shared coherent and IA/ASU Shared AIOC-Direct (NCDRAM) 

regions allow the IA and ASU to manage a private pool of memory without OS 

involvement. For more information on these regions, refer to the Intel

®

 EP80579 

Integrated Processor Product Line Datasheet, Section 3.0.

The IA/ASU Shared coherent and NCDRAM requirements for a particular software 

package are defined in the 

, "Coherent and Non-Coherent Memory 

Allocation" section.

The IA O/S, IA/ASU Shared coherent, and NCDRAM memory regions are allocated from 

the available system memory. The amount of DRAM available for allocation is located 

from address 0x00000000 to the value stored in the TopOfLowMemory (TOLM) register. 

The IA O/S, IA/ASU Shared coherent, and NCDRAM memory regions are allocated from 

available DRAM locations beginning with TOLM downward. NCDRAM memory space is 

allocated first, followed by IA/ASU Shared coherent, followed by IA O/S memory space. 

See 

 for more details.

Coherent††

IA O/S

IA O/S

O/S

Y

IA O/S and application code and 

data structures

IA/ASU Shared 

(Coherent)

CDRAM

EP80579 

Driver

Y

IA and AIOC shared data structures

IA/ASU Shared 

(AIOC-Direct)

NCDRAM

EP80579 

Driver

N

AIOC data structures; IA-32 core 

may access a portion via the 

EP80579 driver

†

The EP80579 Driver includes the EP80579-specific software stacks that run on the IA, ASU, etc. 

††

Indicates whether accesses to the region from the AIOC are coherent with the IA L2 cache.