Intel N455 AU80610006237AA ユーザーズマニュアル

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AU80610006237AA
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Datasheet
53
Power Management
5.1.3
Integrated Graphics Display States
5.1.4
Integrated Memory Controller States
5.1.5
DMI States
5.1.6
Interface State Combinations
Table 5-37.Integrated Graphics Display Device Control
State
Description
D0
Display active
D3
Display power off
Table 5-38.Main Memory States
States
Description
Power-up
CKE asserted. Active mode
Precharge Powerdown
CKE de-asserted (not self-refresh) with all banks closed
Active Powerdown
CKE de-asserted (not self-refresh) with at least one bank active
Self-Refresh
CKE de-asserted using device self-refresh
Table 5-39.DMI States
States
Description
L0
Full on – Active transfer state
L0s
First Active Power Management low power state – Low exit latency
L1
Lowest Active Power Management - Longer exit latency
Table 5-40.G, S and C State combinations
Global 
(G) State
Sleep 
(S) State
Processor 
Core
(C) State
Processor 
State 
System Clocks
Description
G0
S0
C0 
Full On
On 
Full On
G0
S0
C1/C1E
Auto-Halt
On
Auto-Halt
G0
S0
C2/C2E
Stop-Grant
On
Stop-Grant
G0
S0
C4/C4E
Deeper 
Sleep
On
Deeper Sleep
G1
S3
Power off
Off except RTC
Suspend to RAM