Seagate Ultra 160 ユーザーズマニュアル
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Parallel SCSI Interface Product Manual, Rev. A
The target shall read the value of the DB(15-0) signals within one receive hold time of the transition of the ACK
signal. The initiator shall use the pad bytes, if any, in the generation of the transmitted pCRC. The target shall
then use those pad bytes, if any, for checking against the computed pCRC for the current data group. Upon
receipt of the last byte of the pCRC field, the received pCRC and computed pCRC shall be compared.
signal. The initiator shall use the pad bytes, if any, in the generation of the transmitted pCRC. The target shall
then use those pad bytes, if any, for checking against the computed pCRC for the current data group. Upon
receipt of the last byte of the pCRC field, the received pCRC and computed pCRC shall be compared.
If received pCRC and computed pCRC do not match (i.e., a pCRC error is detected), or if an improperly for-
matted data group is transferred, then the associated data group shall be considered invalid.
matted data group is transferred, then the associated data group shall be considered invalid.
If the target does not retry transferring the information transfer or it exhausts its retry limit, the target shall go
into a STATUS phase and send a CHECK CONDITION status with a sense key set to Aborted Command and
an additional sense code set to SCSI Parity Error for the task associated with the pCRC error.
into a STATUS phase and send a CHECK CONDITION status with a sense key set to Aborted Command and
an additional sense code set to SCSI Parity Error for the task associated with the pCRC error.
3.5.3
Paced transfer
If a paced transfer agreement has been established, it shall be used in DT DATA phase and information unit
transfers shall be used. The transfer agreement also specifies the REQ/ACK offset and the transfer period.
transfers shall be used. The transfer agreement also specifies the REQ/ACK offset and the transfer period.
When paced transfers are being used data shall be transferred using DT data transfers on 16-bit wide buses
that transmit and receive data using LVD transceivers.
that transmit and receive data using LVD transceivers.
If driver precompensation is enabled at the SCSI device, that SCSI device shall apply driver precompensation
to all the data, parity, REQ, and ACK signals.
to all the data, parity, REQ, and ACK signals.
During paced DT data transfers, if the phase of the P1 signal indicates data is valid on REQ or ACK assertions,
data shall be clocked by the originating SCSI device by both the assertion and negation of the REQ or ACK
signal lines. The receiving SCSI device shall clock DT data on both the assertion and negation of the REQ or
ACK signal line after having been processed by the receiving SCSI device. If the phase of the P1 signal indi-
cates data is invalid on REQ or ACK assertions, data shall not be clocked by the originating SCSI device and
shall be ignored by the receiving SCSI device. If driver precompensation is enabled at the originating SCSI
device, the originating SCSI device shall apply driver precompensation to all the data signals, the P_CRCA sig-
nal, the P1 signal, and the REQ, and or ACK signal.
data shall be clocked by the originating SCSI device by both the assertion and negation of the REQ or ACK
signal lines. The receiving SCSI device shall clock DT data on both the assertion and negation of the REQ or
ACK signal line after having been processed by the receiving SCSI device. If the phase of the P1 signal indi-
cates data is invalid on REQ or ACK assertions, data shall not be clocked by the originating SCSI device and
shall be ignored by the receiving SCSI device. If driver precompensation is enabled at the originating SCSI
device, the originating SCSI device shall apply driver precompensation to all the data signals, the P_CRCA sig-
nal, the P1 signal, and the REQ, and or ACK signal.
For paced DT DATA IN phases the REQ/ACK offset specifies the maximum number of data valid state REQ
assertions that shall be sent by the SCSI target port in advance of the number of ACK assertions received from
the SCSI initiator port. If the number of data valid state REQ assertions exceeds the number of ACK assertions
by the REQ/ACK offset, the SCSI target port shall change P1 to enable the data invalid state prior to the next
assertion of REQ and shall not change P1 to enable a data valid state until after the next ACK assertion is
received. For successful completion of a paced DT DATA IN phase, the number of data valid state REQ asser-
tions and ACK assertions shall be equal. Each assertion indicates a single 32-bit data transfer.
assertions that shall be sent by the SCSI target port in advance of the number of ACK assertions received from
the SCSI initiator port. If the number of data valid state REQ assertions exceeds the number of ACK assertions
by the REQ/ACK offset, the SCSI target port shall change P1 to enable the data invalid state prior to the next
assertion of REQ and shall not change P1 to enable a data valid state until after the next ACK assertion is
received. For successful completion of a paced DT DATA IN phase, the number of data valid state REQ asser-
tions and ACK assertions shall be equal. Each assertion indicates a single 32-bit data transfer.
For paced DT DATA OUT phases the REQ/ACK offset specifies the maximum number of REQ assertions that
shall be sent by the SCSI target port in advance of the number of data valid state ACK assertions that shall be
sent by the SCSI target port in advance of the number of data valid state ACK assertions received from the
SCSI initiator port. If the number of REQ assertions exceeds the number of data valid state ACK assertions by
the REQ/ACK offset, the SCSI target port shall not assert REQ until after the next data valid state ACK asser-
tion is received. For successful completion of a paced DT DATA OUT phase, the number of REQ assertions
and data valid state ACK assertions shall be equal. Each assertion indicates a single 32-bit data transfer.
shall be sent by the SCSI target port in advance of the number of data valid state ACK assertions that shall be
sent by the SCSI target port in advance of the number of data valid state ACK assertions received from the
SCSI initiator port. If the number of REQ assertions exceeds the number of data valid state ACK assertions by
the REQ/ACK offset, the SCSI target port shall not assert REQ until after the next data valid state ACK asser-
tion is received. For successful completion of a paced DT DATA OUT phase, the number of REQ assertions
and data valid state ACK assertions shall be equal. Each assertion indicates a single 32-bit data transfer.
Implementors shall not use the following subsections for timing requirements. For timing requirements, see
Section 2.5.
Section 2.5.
3.5.3.1
Paced transfer training pattern
After any PPR negotiation occurs that enables paced transfers, a training pattern shall be transferred at the
start of the first DT data phase for each data transfer direction regardless of the negotiated value of the RTI bit.
start of the first DT data phase for each data transfer direction regardless of the negotiated value of the RTI bit.
If retain training information is disabled, a training pattern shall be transferred at the start of the first DT DATA
phase for each data transfer direction after each physical connect and physical reconnect. The training pattern
shall not be transferred again until after a physical disconnection occurs.
phase for each data transfer direction after each physical connect and physical reconnect. The training pattern
shall not be transferred again until after a physical disconnection occurs.