Seagate Ultra 320 ユーザーズマニュアル

ページ / 186
Parallel SCSI Interface Product Manual, Rev. A                                        
   59
glitch may cause the BSY signal to appear false for up to a round-trip propagation delay following the 
release of the BSY signal by the initiator. This is the reason why the BUS FREE phase is recognized 
only after both the BSY and SEL signals are continuously false for a minimum of one bus settle delay. 
For more information on glitches, see ANSI SPI-5, T10/1525D.
3.3.3
Physical reconnection timeout procedure
Two optional physical reconnection timeout procedures are specified for clearing the SCSI bus during a RESE-
LECTION phase if the target waits a minimum of one selection timeout delay and there has been no BSY sig-
nal response from the initiator:
• Optionally, the target shall assert the RST signal (see sections 5.3 and 5.4).
• Optionally, the target shall continue asserting the SEL and I/O signals and shall release all Data Bus, 
DB(P_CRCA), and/or DB(P1) signals. If the target has not detected the BSY signal to be true after at least a 
selection abort time plus two system deskew delays, the target shall release the SEL and I/O signals allow-
ing the SCSI bus to go to the BUS FREE phase. SCSI devices shall ensure that the physical reconnection 
was still valid within one selection abort time of their assertion of the BSY signal. Failure to comply with this 
requirement may result in an improper physical reconnection (two initiators connected to the same target or 
the wrong initiator connected to a SCSI target port).
3.4
SCSI bus fairness
Implementation of the SCSI bus fairness is optional, however, if implemented, the SCSI bus fairness protocol 
shall conform to ANSI specification SPI-5, Annex B.
A SCSI device determines “fairness” by monitoring prior arbitration attempts by other SCSI devices. It shall 
postpone arbitration for itself until all lower priority SCSI devices that previously lost arbitration either win a 
subsequent arbitration or discontinue their arbitration attempts (as in the case where the initiator aborted an 
outstanding command thus removing the need to re-arbitrate).
When a SCSI device does not need to arbitrate for the SCSI bus, it shall monitor the arbitration attempts of the 
other SCSI devices and update a fairness register with the SCSI IDs of any lower priority SCSI devices that 
lost arbitration.
When a requirement for arbitration arises, the SCSI device shall first check to see if its fairness register is clear 
(see Section 3.1.2.3). If it is clear, then no lower priority SCSI devices had attempted and lost the previous arbi-
tration and therefore, this SCSI device may now participate in arbitration. If the fairness register is not clear, the 
SCSI device shall postpone arbitration until all lower priority SCSI IDs have been cleared from the fairness reg-
ister. Lower SCSI IDs are cleared as those lower level SCSI devices win arbitration. SCSI IDs shall also be 
cleared if a SCSI device discontinues arbitration (e.g., as a result of an ABORT TASK message, ABORT TASK 
SET message, CLEAR TASK SET message, or logical unit reset).
The fairness register may be refreshed, updated or cleared. The fairness register is refreshed by copying the 
SCSI IDs of any lower priority SCSI devices that lost arbitration into the fairness register. A refresh of the fair-
ness register completely replaces the previous contents of the fairness register. The fairness register is 
updated by removing the SCSI IDs of any lower priority devices that win arbitration or discontinue arbitration. 
The fairness register is cleared by setting all of its bits to zero. SCSI IDs may only be added to the fairness reg-
ister by a refresh but may be subtracted by a refresh, update, or clear.
Since the fairness register is only refreshed when the SCSI device is not arbitrating for itself, the fairness regis-
ter is effectively frozen by the SCSI device prior to a requirement for its own arbitration arising. Other lower pri-
ority SCSI devices that were not latched shall not be added to the fairness register until this SCSI device has 
successfully arbitrated.
See ANSI specification SPI-5, Annex B, for details and timing for the SCSI bus fairness algorithm.