Seagate ST3450856SS ユーザーズマニュアル

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Cheetah 15K.6 SAS Product Manual, Rev. A
69
9.5.2.3.2
Receiver jitter tolerance
Table 19 defines the amount of jitter the receiver shall tolerate .
9.5.2.3.3
Compliant jitter test pattern (CJTPAT)
The CJTPAT within a compliant protocol frame is used for all jitter testing unless otherwise specified. See the 
SAS Interface Manual for definition of the required pattern on the physical link and information regarding spe-
cial considerations for scrambling and running disparity.
9.5.2.3.4
Impedance specifications
Table 20 defines impedance requirements.
Table 19: 
Receiver jitter tolerance
1.5 Gbps
3.0 Gbps
Sinusoidal
Deterministic
Total
Sinusoidal
Deterministic
jitter
Total
0.10
0.35
0.65
0.10
0.35
0.65
a Units are in UI.
b The jitter values given are normative for a combination of deterministic jitter, random jitter, and sinusoidal jitter that 
receivers shall be able to tolerate without exceeding a BER of 10
-12
. Receivers shall tolerate sinusoidal jitter of 
progressively greater amplitude at lower frequencies, according to the mask in figure 19 with the same deterministic 
jitter and random jitter levels as were used in the high frequency sweep.
c Sinusoidal swept frequency: 900 kHz to > 5 MHz.
d Sinusoidal swept frequency: 1.800 kHz to > 5 MHz.
e No value is given for random jitter. For compliance with this standard, the actual random jitter amplitude shall be the 
value that brings total jitter to the stated value at a probability of 10
-12
. The additional 0.1 UI of sinusoidal jitter is 
added to ensure the receiver has sufficient operating margin in the presence of external interference.
f Deterministic jitter: 900 kHz to 750 MHz.
g Deterministic jitter: 1.800 kHz to 1.500 MHz.
h The deterministic and total values in this table apply to jitter after application of a single pole high-pass frequency-
weighting function that progressively attenuates jitter at 20 dB/decade below a frequency of ((bit rate) / 1.667).
Table 20: 
Impedance requirements (Sheet 1 of 2)
Requirement
Units
1.5 Gbps
3.0 Gbps
Time domain reflectometer rise time 20 % to 80 %
ps
100
50
Media (PCB or cable)
Differential impedance
ohm
100 ± 10
100 ± 10
Differential impedance imbalance
ohm
5
5
Common mode impedance
ohm
32.5 ± 7.5
32.5 ± 7.5
Mated connectors
Differential impedance
ohm
100 ± 15
100 ± 15
Differential impedance imbalance
ohm
5
 5
Common mode impedance
ohm
32.5 ± 7.5
32.5 ± 7.5
Receiver termination
Differential impedance
ohm
100 ± 15
100 ± 15
Differential impedance imbalance
ohm
5
5
Receiver termination time constant
ps
150 max
100 max