Intel 31244 PCI-X ユーザーズマニュアル
65
Terminations: Pull-down/Pull-ups
11
This chapter provides the requirements for pull-down and pull-up terminations for the Intel
®
31244
PCI-X to serial ATA controller.
The PCI-X interface pull-down/pull-up recommendation depends on the application.
details the termination of these signals when the following factors are true:
1. Embedded or motherboard application (non PCI/X plug-in card) with the GD31244 PCI-X
interface as the primary interface.
2. Plug-in card with a PCI/X bridge as the interface into the slot. The GD31244 PCI-X interface is
on a non-primary (i.e., secondary side) of the bridge.
When the application is a PCI/X plug-in card into a standard PC-style motherboard, the PCI Local
Bus Specification, Revision 2.2, requires that the termination of these signals be placed on the
motherboard.
Bus Specification, Revision 2.2, requires that the termination of these signals be placed on the
motherboard.
The GD31244 uses 10 K pull-ups. The range of values is dependent on the number of loads in the
user application. It may be determined from the formula for the pull-ups as stated in the PCI Local
Bus Specification, Revision 2.2, as follows:
user application. It may be determined from the formula for the pull-ups as stated in the PCI Local
Bus Specification, Revision 2.2, as follows:
•
Rmin = [Vcc(max) - Vol’]/[Iol+(16 x Iol)] where 16 is the maximum number of loads
•
Rmax = [Vcc(min) - Vx]/[num_loads x Imin] where Vx = 0.7 V
CC
for 3.3 V signaling:
Table 30.
Terminations: Pull-up/Pull-down (Sheet 1 of 2)
Signal Name
Pull-up or Pull-down
Comments
V18A
and
comments
Connect this pin to 10 µF capacitor and 0.1 µF cap in
parallel. The opposite end of the caps are connected to
GND.
parallel. The opposite end of the caps are connected to
GND.
V18B
and
comments
Connect this pin to 10 µF capacitor and 0.1 µF cap in
parallel. The opposite end of the caps are connected to
GND.
parallel. The opposite end of the caps are connected to
GND.
VA0
and
comments
Use low inductance capacitors
VA1
and
comments
Use low inductance capacitors
CAP0
and
comments
This pin is connected to a 0.1 µF cap with the other end
connected to the CAP1 pin.
connected to the CAP1 pin.
CAP1
and
comments
This pin is connected to a 0.1 µF cap with the other end
connected to the CAP0 pin.
connected to the CAP0 pin.
CAP2
and
comments
This pin is connected to a 0.015 µF cap with the other end
connected to the CAP3 pin.
connected to the CAP3 pin.
CAP3
and
comments
This pin is connected to a 0.015 µF cap with the other end
connected to the CAP2 pin.
connected to the CAP2 pin.
V
CC5REF
Refer to comments
In 5 V tolerant systems, this should be connected to a 5 V
supply. In 3.3V powered systems this should be
connected to 3.3 V. In PCI add-in cards, this would
normally be connected to I/O Power (10 A, 16 A, 19 B, 59
A and 59 B).
supply. In 3.3V powered systems this should be
connected to 3.3 V. In PCI add-in cards, this would
normally be connected to I/O Power (10 A, 16 A, 19 B, 59
A and 59 B).
RBIAS
and
comments
Connect pin to a 1% 1000 ohm resistor to GND.