Motorola ATCA-717 ユーザーズマニュアル

Bit

Access

Default

Description

Signal

2

PB_RES

Face plate push button Reset
0: Disabled
1: Enabled

1

2

r/w

3

DB_RES

ITP debug reset
0: Disabled
1: Enabled

1

2

r/w

4

RTM_RES

RTM reset
0: Disabled
1: Enabled

1

2

r/w

5

PMC_RST

a

PMC slots reset
0 : Disabled
1: Enabled

1

2

r/w

6

−

Reserved

0

2

r

7

−

Reserved

0

2

r

This register, which is accessible via the index address 0x02, indicates the status of the
default and backup boot flash regarding write−protection, crisis recovery and booting.
Additionally, this register allows to set the write−protection of the default boot flash
data/instruction area.

aa

Table 25:

 Miscellaneous Switch Status Register

Bit

Description

Default

Access

0

Default boot flash boot block write
protection
0: Write−protected
1: Write−enabled

0

2

r

1

Default boot flash data/instruction block
write protection (provided that bit 4 is set,
software can set this status)
0: Write−protected
1: Write−enabled

1

2

r/w

2

Backup boot flash boot block write
protection
0: Write−protected
1: Write−enabled

0

2

r

3

Backup boot flash data/instruction block
write protection
0: Write−protected
1: Write−enabled

0

2

r