Cypress CY62167E MoBL ユーザーズマニュアル

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CY62167E MoBL
®
Document #: 001-15607 Rev. *A
Page 3 of 12
Maximum Ratings
Exceeding the maximum ratings may shorten the battery life
of the device. User guidelines are not tested.
Storage Temperature  ................................–65°C to + 150°C
Ambient Temperature with
Power Applied............................................–55°C to + 125°C
Supply Voltage to Ground 
Potential ........................................................... –0.5V to 6.0V
DC Voltage Applied to Outputs
in High-Z State
........................................... –0.5V to 6.0V
DC Input Voltage
........................................–0.5V to 6.0V
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage...........................................  >2001V
(MIL-STD-883, Method 3015)
Latch Up Current ..................................................... >200 mA
Operating Range
Device
Range
Ambient 
Temperature
V
CC
CY62167ELL
Industrial –40°C to +85°C  4.5V  to 5.5V
Electrical Characteristics 
Over the Operating Range
Parameter
Description
Test Conditions
45 ns
Unit
Min
Typ
Max
V
OH
Output HIGH Voltage
I
OH
 = –1.0 mA
2.4
V
V
OL
Output LOW Voltage
I
OL
 = 2.1mA
0.4
V
V
IH
Input HIGH Voltage
V
CC 
= 4.5V to 5.5V
2.2
V
CC 
+ 0.5V
V
V
IL
Input LOW Voltage
V
CC 
= 4.5V to 5.5V
–0.5
0.7
V
I
IX
Input Leakage Current
GND < V
I
 < V
CC
–1
+1
µA
I
OZ
Output Leakage Current
GND < V
< V
CC
, Output Disabled
–1
+1
µA
I
CC
V
CC
 Operating Supply 
Current 
f = f
MAX
 = 1/t
RC
V
CC
 = V
CC
(max)
I
OUT
 = 0 mA
CMOS levels
25
30
mA
f = 1 MHz
2.2
4.0
mA
I
SB2
Automatic CE Power Down 
Current—CMOS Inputs
CE
1
 > V
CC
 – 0.2V or CE
2
 < 0.2V,
V
IN
 > V
CC
 – 0.2V or V
IN
 < 0.2V,
f = 0, V
CC
 = V
CC(max)
1.5
12
µA
Capacitance
Parameter
Description
Test Conditions
Max
Unit
C
IN
Input Capacitance
T
A
 = 25°C, f = 1 MHz,
V
CC
 = V
CC(typ)
10
pF
C
OUT
Output Capacitance
10
pF
Thermal Resistance
Parameter
Description
Test Conditions
TSOP I
Unit
Θ
JA
Thermal Resistance 
(junction to ambient)
Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit 
board
60
°C/W
Θ
JC
Thermal Resistance 
(junction to case)
4.3
°C/W
Notes
5. V
IL
(min) = –2.0V for pulse durations less than 20 ns.
6. V
IH
(max) = V
CC
 + 0.75V for pulse durations less than 20 ns.
7. Full Device AC operation is based on a 100 
µs ramp time from 0 to V
CC
 (min) and 200 
µs wait time after V
CC
 stabilization.
8. Under DC conditions the device meets a V
IL
 of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7V.
9. Only chip enables (CE
and CE
2
), byte enables (BHE and BLE) and BYTE need to be tied to CMOS levels to meet the I
SB2
 / I
CCDR 
spec. Other inputs can be 
left floating.
10. Tested initially and after any design or process changes that may affect these parameters.