Samsung C8278X ユーザーズマニュアル
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X MICROCONTROLLER
xiii
List of Figures
(Continued)
Page
Title
Page
Number
Number
9-19
Port 4 High-Byte Control Register (P4CONH) ...........................................................9-15
9-20
Port 4 Low-Byte Control Register (P4CONL) .............................................................9-16
9-21
Port 5 High-Byte Control Register (P5CONH) ...........................................................9-17
9-22
Port 5 Low-Byte Control Register (P5CONL) .............................................................9-18
9-23
Port 6 Control Register (P6CON) ...............................................................................9-19
10-1
Basic Timer Control Register (BTCON) .....................................................................10-2
10-2
Basic Timer Block Diagram ........................................................................................10-4
11-1
Timer 1/A Control Register (TACON).........................................................................11-2
11-2
Timer 1 Block Diagram (One 16-bit Mode) ................................................................11-3
11-3
Timer 1/A Control Register (TACON).........................................................................11-5
11-4
Timer B Control Register (TBCON)............................................................................11-6
11-5
Timer A Block Diagram(Two 8-bit Timers Mode) .......................................................11-7
11-6
Timer B Block Diagram (Two 8-bit Timers Mode) ......................................................11-8
12-1
Watch Timer Control Register (WTCON) ...................................................................12-2
12-2
Watch Timer Circuit Diagram .....................................................................................12-3
13-1
LCD Function Diagram ...............................................................................................13-1
13-2
LCD Circuit Diagram...................................................................................................13-2
13-3
LCD Display Data RAM Organization ........................................................................13-3
13-4
LCD Control Register (LCON)....................................................................................13-4
13-5
Internal Voltage Dividing Resistor Connection...........................................................13-5
13-6
Select/No-Select Signals in Static Display Mode .......................................................13-6
13-7
Select/No-Select Signal in 1/2 Duty, 1/2 Bias Display Mode .....................................13-7
13-8
Select/No-Select Signal in 1/3 Duty, 1/3 Bias Display Mode .....................................13-7
13-9
LCD Signals and Wave Forms Example in 1/4 Duty, 1/3 Bias Display Mode............13-8
14-1
Serial I/O Module Control Register (SIOCON) ...........................................................14-2
14-2
SIO Prescaler Register (SIOPS) ................................................................................14-3
14-3
SIO Functional Block Diagram ...................................................................................14-3
14-4
Serial I/O Timing in Transmit/Receive Mode (Tx at falling, SIOCON.4 = 0) ..............14-4
14-5
Serial I/O Timing in Transmit/Receive Mode (Tx at rising, SIOCON.4 = 1) ...............14-4
15-1
Block Diagram for Voltage Level Detect.....................................................................15-1
15-2
Battery Level Detect Circuit and Control Register......................................................15-2
16-1
Flash Memory Control Register (FMCON) .................................................................16-2
16-2
Flash Memory User-Programming Enable Register (FMUSR) ..................................16-3
16-3
Flash Memory Sector Address Register, High Byte (FMSECH) ................................16-4
16-4
Flash Memory Sector Address Register, Low Byte (FMSECL) .................................16-4
16-5
Program Memory Address Space ..............................................................................16-5
16-6
Sector Configurations in User Program Mode ...........................................................16-7