Samsung C8278X ユーザーズマニュアル

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S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X  
ADDRESS 
SPACES 
 
2-5 
REGISTER ARCHITECTURE 
In the S3C8275X/C8278X/C8274X implementation, the upper 64-byte area of register files is expanded two 
64-byte areas, called set 1 and set 2. The upper 32-byte area of set 1 is further expanded two 32-byte register 
banks (bank 0 and bank 1), and the lower 32-byte area is a single 32-byte common area.  
In case of S3C8275X the total number of addressable 8-bit registers is 605. Of these 605 registers, 13 bytes are 
for CPU and system control registers, 16 bytes are for LCD data registers, 48 bytes are for peripheral control and 
data registers, 16 bytes are used as a shared working registers, and 512 registers are for general-purpose use, 
page 0-page 1 (in case of S3C8278X/C8274X, page 0). 
You can always address set 1 register locations, regardless of which of the two register pages is currently 
selected. Set 1 locations, however, can only be addressed using register addressing modes. 
The extension of register space into separately addressable areas (sets, banks, and pages) is supported by 
various addressing mode restrictions, the select bank instructions, SB0 and SB1, and the register page pointer 
(PP). 
Specific register types and the area (in bytes) that they occupy in the register file are summarized in Table 2-1. 
Table 2-1. S3C8275X Register Type Summary 
Register Type 
Number of Bytes 
General-purpose registers (including the 16-byte 
common working register area, two 192-byte prime 
register area, and two 64-byte set 2 area) 
LCD data registers 
CPU and system control registers 
Mapped clock, peripheral, I/O control, and data registers
528 
 
 
16 
13 
48 
Total Addressable Bytes 
605 
 
Table 2-2. S3C8278X/C8274X Register Type Summary 
Register Type 
Number of Bytes 
General-purpose registers (including the 16-byte 
common working register area, one 192-byte prime 
register area, and one 64-byte set 2 area) 
LCD data registers 
CPU and system control registers 
Mapped clock, peripheral, I/O control, and data registers
272 
 
 
16 
13 
48 
Total Addressable Bytes 
349