Samsung C8278X ユーザーズマニュアル

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ADDRESS SPACES 
 
 S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X 
2-18 
 
 
PROGRAMMING TIP — Addressing the Common Working Register Area 
As the following examples show, you should access working registers in the common area, locations C0H–CFH, 
using working register addressing mode only. 
Examples 
1. LD 
0C2H,40H 
;  Invalid addressing mode! 
 
  Use working register addressing instead: 
  
SRP 
#0C0H 
  
LD 
R2,40H 
R2 
(C2H) 
→  the value in location 40H 
 
 2. ADD 
0C3H,#45H 
;  Invalid addressing mode! 
 
  Use working register addressing instead: 
 
  
SRP 
#0C0H 
  
ADD 
R3,#45H 
R3 
(C3H) 
→  R3 + 45H 
4-BIT WORKING REGISTER ADDRESSING 
Each register pointer defines a movable 8-byte slice of working register space. The address information stored in 
a register pointer serves as an addressing "window" that makes it possible for instructions to access working 
registers very efficiently using short 4-bit addresses. When an instruction addresses a location in the selected 
working register area, the address bits are concatenated in the following way to form a complete 8-bit address: 
—  The high-order bit of the 4-bit address selects one of the register pointers ("0" selects RP0, "1" selects RP1). 
—  The five high-order bits in the register pointer select an 8-byte slice of the register space. 
—  The three low-order bits of the 4-bit address select one of the eight registers in the slice. 
As shown in Figure 2-13, the result of this operation is that the five high-order bits from the register pointer are 
concatenated with the three low-order bits from the instruction address to form the complete address. As long as 
the address stored in the register pointer remains unchanged, the three bits from the address will always point to 
an address in the same 8-byte register slice. 
Figure 2-14 shows a typical example of 4-bit working register addressing. The high-order bit of the instruction 
"INC R6" is "0", which selects RP0. The five high-order bits stored in RP0 (01110B) are concatenated with the 
three low-order bits of the instruction's 4-bit address (110B) to produce the register address 76H (01110110B).